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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 14 CAN CONTROLLER<br />

14.2.4 Error frame<br />

An error frame is output by a node that has detected an error.<br />

Figure 14-15. Error Frame<br />

Error frame<br />

R<br />

D<br />

() ()<br />

Remark D: Dominant = 0<br />

R: Recessive = 1<br />

6 bits 1 to 6 bits 8 bits<br />

Interframe space or overload frame<br />

Error delimiter<br />

Error flag2<br />

Error flag1<br />

Error bit<br />

Table 14-7. Definition Error Frame Fields<br />

No. Name Bit Count Definition<br />

Error flag1 6 Error active node: Outputs 6 dominant-level bits consecutively.<br />

Error passive node: Outputs 6 recessive-level bits consecutively.<br />

If another node outputs a dominant level while one node is outputting a<br />

passive error flag, the passive error flag is not cleared until the same level<br />

is detected 6 bits in a row.<br />

Error flag2 0 to 6 Nodes receiving error flag 1 detect bit stuff errors and issues this error<br />

flag.<br />

Error delimiter 8 Outputs 8 recessive-level bits consecutively.<br />

If a dominant level is detected at the 8th bit, an overload frame is<br />

transmitted from the next bit.<br />

Error bit – The bit at which the error was detected.<br />

Interframe space/overload<br />

frame<br />

The error flag is output from the bit next to the error bit.<br />

In the case of a CRC error, this bit is output following the ACK delimiter.<br />

– An interframe space or overload frame starts from here.5<br />

R01UH0317EJ0004 Rev. 0.04 795<br />

Feb. 22, 2013

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