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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 9 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER<br />

(4) Sound generator and PCL pin select register (SGSEL)<br />

This register is used for alternate switch of sound generator and PCL output pins.<br />

SGOA output can be stopped when it is not used if SGSEL2 is set to “1”.<br />

Figure 9-5. Format of sound generator and PCL pin select register (SGSEL)<br />

Address: FFF3FH After reset: 00H R/W<br />

Symbol 7 6 5 4 3 2 1 0<br />

SGSEL 0 0 0 0 PCLSEL SGSEL2 SGSEL1 SGSEL0<br />

SGSEL2 SGSEL1 SGSEL0<br />

Pin select of sound generator outputs<br />

SGO/SGOF SGOA<br />

0 0 0 P73 P72<br />

0 0 1 P93 P92<br />

0 1 0 P135 P134<br />

0 1 1 Setting prohibit<br />

1 0 0 P73<br />

No port is selected<br />

1 0 1 P93<br />

(output disabled)<br />

1 1 0 P135<br />

1 1 1 Setting prohibit<br />

Note The driving capability of SGO/SGOF alternate pin (P73, P93, P135) is larger than normal buffer.<br />

P93 is also alternated as Stepper-Motor function, so its driving characteristics is the same as SM buffer.<br />

P73 and P135 are the same as SG buffer of 78K0/Dx2.<br />

PCLSEL PCL output pin selection<br />

0 P75 (default, be available for 48/64/80/100pin)<br />

1 P66 (option for 80/100pin)<br />

R01UH0317EJ0004 Rev. 0.04 495<br />

Feb. 22, 2013

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