04.03.2013 Views

RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 23 POWER-ON-RESET CIRCUIT<br />

Checking reset source<br />

Figure 23-3. Example of Software Processing After Reset Release (2/2)<br />

Check reset source<br />

TRAP of RESF<br />

register = 1?<br />

No<br />

WDTRF of RESF<br />

register = 1?<br />

No<br />

RPERF of RESF<br />

register = 1?<br />

No<br />

IAWRF of RESF<br />

register = 1?<br />

No<br />

LVIRF of RESF<br />

register = 1?<br />

No<br />

Power-on-reset/external<br />

reset generated<br />

Yes<br />

Yes<br />

Yes<br />

Yes<br />

Yes<br />

Reset processing by<br />

illegal instruction execution Note<br />

Reset processing by<br />

watchdog timer<br />

Reset processing by<br />

RAM parity error<br />

Reset processing by<br />

illegal-memory access<br />

Reset processing by<br />

voltage detector<br />

Note The illegal instruction is generated when instruction code FFH is executed.<br />

Reset by the illegal instruction execution not issued by emulation with the in-circuit emulator or on-chip<br />

debug emulator.<br />

R01UH0317EJ0004 Rev. 0.04 1113<br />

Feb. 22, 2013

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