RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 3 CPU ARCHITECTURE Table 3-6. Extended SFR (2nd SFR) List (17/26) Address Special Function Register (SFR) Name Symbol R/W Manipulable Bit Range After Reset 1-bit 8-bit 16-bit F04E0H CAN1 message data byte 01 register 14 C1MDB0114 R/W Undefined F04E0H CAN1 message data byte 0 register 14 C1MDB014 R/W Undefined F04E1H CAN1 message data byte 1 register 14 C1MDB114 R/W Undefined F04E2H CAN1 message data byte 23 register 14 C1MDB2314 R/W Undefined F04E2H CAN1 message data byte 2 register 14 C1MDB214 R/W Undefined F04E3H CAN1 message data byte 3 register 14 C1MDB314 R/W Undefined F04E4H CAN1 message data byte 45 register 14 C1MDB4514 R/W Undefined F04E4H CAN1 message data byte 4 register 14 C1MDB414 R/W Undefined F04E5H CAN1 message data byte 5 register 14 C1MDB514 R/W Undefined F04E6H CAN1 message data byte 67 register 14 C1MDB6714 R/W Undefined F04E6H CAN1 message data byte 6 register 14 C1MDB614 R/W Undefined F04E7H CAN1 message data byte 7 register 14 C1MDB714 R/W Undefined F04E8H CAN1 message data length register 14 C1MDLC14 R/W 0XH F04E9H CAN1 message Configuration register 14 C1MCONF14 R/W Undefined F04EAH CAN1 message ID register 14L C1MIDL14 R/W Undefined F04ECH CAN1 message ID register 14H C1MIDH14 R/W Undefined F04EEH CAN1 message control register 14 C1MCTRL14 R/W Undefined F04F0H CAN1 message data byte 01 register 15 C1MDB0115 R/W Undefined F04F0H CAN1 message data byte 0 register 15 C1MDB015 R/W Undefined F04F1H CAN1 message data byte 1 register 15 C1MDB115 R/W Undefined F04F2H CAN1 message data byte 23 register 15 C1MDB2315 R/W Undefined F04F2H CAN1 message data byte 2 register 15 C1MDB215 R/W Undefined F04F3H CAN1 message data byte 3 register 15 C1MDB315 R/W Undefined F04F4H CAN1 message data byte 45 register 15 C1MDB4515 R/W Undefined F04F4H CAN1 message data byte 4 register 15 C1MDB415 R/W Undefined F04F5H CAN1 message data byte 5 register 15 C1MDB515 R/W Undefined F04F6H CAN1 message data byte 67 register 15 C1MDB6715 R/W Undefined F04F6H CAN1 message data byte 6 register 15 C1MDB615 R/W Undefined F04F7H CAN1 message data byte 7 register 15 C1MDB715 R/W Undefined F04F8H CAN1 message data length register 15 C1MDLC15 R/W 0XH F04F9H CAN1 message Configuration register 15 C1MCONF15 R/W Undefined F04FAH CAN1 message ID register 15L C1MIDL15 R/W Undefined F04FCH CAN1 message ID register 15H C1MIDH15 R/W Undefined F04FEH CAN1 message control register 15 C1MCTRL15 R/W Undefined F05C0H CAN0 global module control register C0GMCTRL R/W 0000H F05C6H CAN0 global block transmission control register C0GMABT R/W 0000H F05C8H CAN0 global block transmission delay setting register C0GMABTD R/W 00H F05CEH CAN0 global module clock select register C0GMCS R/W 0FH R01UH0317EJ0004 Rev. 0.04 121 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 3 CPU ARCHITECTURE Table 3-6. Extended SFR (2nd SFR) List (18/26) Address Special Function Register (SFR) Name Symbol R/W Manipulable Bit Range After Reset 1-bit 8-bit 16-bit F05D0H CAN0 module mask 1 register L C0MASK1L R/W Undefined F05D2H CAN0 module mask 1 register H C0MASK1H R/W Undefined F05D4H CAN0 module mask 2 register L C0MASK2L R/W Undefined F05D6H CAN0 module mask 2 register H C0MASK2H R/W Undefined F05D8H CAN0 module mask 3 register L C0MASK3L R/W Undefined F05DAH CAN0 module mask 3 register H C0MASK3H R/W Undefined F05DCH CAN0 module mask 4 register L C0MASK4L R/W Undefined F05DEH CAN0 module mask 4 register H C0MASK4H R/W Undefined F05E0H CAN0 module control register C0CTRL R/W 0000H F05E2H CAN0 module last error information register C0LEC R/W 00H F05E3H CAN0 module information register C0INFO R 00H F05E4H CAN0 module error counter register C0ERC R 0000H F05E6H CAN0 module interrupt enable register C0IE R/W 0000H F05E8H CAN0 module interrupt status register C0INTS R/W 0000H F05EAH CAN0 module bit rate prescaler register C0BRP R/W FFH F05ECH CAN0 module bit rate register C0BTR R/W 370FH F05EEH CAN0 module last in-pointer register C0LIPT R Undefined F05F0H CAN0 module receive history list register C0RGPT R/W XX02H F05F2H CAN0 module last out-pointer register C0LOPT R Undefined F05F4H CAN0 module transmit history list register C0TGPT R/W XX02H F05F6H CAN0 module time stamp register C0TS R/W 0000H F0600H CAN0 message data byte 01 register 00 C0MDB000 C0MDB0100 R/W Undefined F0601H C0MDB100 F0602H CAN0 message data byte 23 register 00 C0MDB200 F0603H C0MDB300 F0604H CAN0 message data Byte 45 register 00 C0MDB400 F0605H C0MDB500 F0606H CAN0 message data byte 67 register 00 C0MDB600 F0607H C0MDB700 F0608H CAN0 message data length register 00 C0MDLC00 F0609H CAN0 message configuration register 00 C0MCONF00 F060AH CAN0 message ID register 00L C0MIDL00 F060CH CAN0 message ID register 00H C0MIDH00 F060EH CAN0 message control register 00 C0MCTRL00 C0MDB2300 C0MDB4500 C0MDB6700 R/W Undefined R/W Undefined R/W Undefined R/W 0XH R/W Undefined R/W Undefined R/W Undefined R/W Undefined R01UH0317EJ0004 Rev. 0.04 122 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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RL78/D1A User’s Manual: Hardware
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