RL78/D1A User's Manual: Hardware - Renesas

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R01UH0317EJ0004 Rev. 0.04 1301 Feb. 22, 2013 Necessary WAIT I/O register(SFR) name R/W Bit R/W Address READ(MIN.) READ(MAX.) WRITE(MIN.) WRITE(MAX.) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 8 16 7 6 5 4 3 2 1 0 Retry-number 2 +1 where the retry-number is calculated according F045A C1MIDL05 (CAN1 message ID register 05L) - - E - - - - - - - - to the following method: (Abort under radix point) For read F045C C1MIDH05 (CAN1 message ID register 05H) - - E - - - - - - - - Min. (1/fCAN) 3/ (1/fCLK) F045E C1MCTRL05 (CAN1 message control register 05) - - E - - - - - - - - Max. (1/fCAN) 4/ (1/fCLK) C1MDB0106 (CAN1 message data byte 01 register 06) - - E - - - - - - - - For 8 bit-write F0460 Min. (1/fCAN) 4/ (1/fCLK) Max. (1/fCAN) 5/ (1/fCLK) C1MDB006 - E - - - - - - - - - For 16 bit-write F0461 C1MDB106 - E - - - - - - - - - Min. (1/fCAN) 2/ (1/fCLK) C1MDB2306 (CAN1 message data byte 23 register 06) - - E - - - - - - - - Max. (1/fCAN) 3/ (1/fCLK) F0462 C1MDB206 - E - - - - - - - - - F0463 C1MDB306 - E - - - - - - - - - F0464 C1MDB4506 (CAN1 message data byte 45 register 06) - - E - - - - - - - - C1MDB406 - E - - - - - - - - - F0465 C1MDB506 - E - - - - - - - - - F0466 C1MDB6706 (CAN1 message data byte 67 register 06) - - E - - - - - - - - C1MDB606 - E - - - - - - - - - F0467 C1MDB706 - E - - - - - - - - - F0468 C1MDLC06 (CAN1 message data length register 06) - E - - - - - - - - - F0469 C1MCONF06 (CAN1 message Configuration register 06) - E - - - - - - - - - F046A C1MIDL06 (CAN1 message ID register 06L) - - E - - - - - - - - F046C C1MIDH06 (CAN1 message ID register 06H) - - E - - - - - - - - F046E C1MCTRL06 (CAN1 message control register 06) - - E - - - - - - - - F0470 C1MDB0107 (CAN1 message data byte 01 register 07) - - E - - - - - - - - C1MDB007 - E - - - - - - - - - F0471 C1MDB107 - E - - - - - - - - - F0472 C1MDB2307 (CAN1 message data byte 23 register 07) - - E - - - - - - - - C1MDB207 - E - - - - - - - - - F0473 C1MDB307 - E - - - - - - - - - F0474 C1MDB4507 (CAN1 message data byte 45 register 07) - - E - - - - - - - - C1MDB407 - E - - - - - - - - - F0475 C1MDB507 - E - - - - - - - - - F0476 C1MDB6707 (CAN1 message data byte 67 register 07) - - E - - - - - - - - C1MDB607 - E - - - - - - - - - 1301 RL78/D1A APPENDIX A NUMBER OF WAIT CYCLES TO ACCESS I/O REGISTERS Specifications in this document are tentative and subject to change. Under development Preliminary document
R01UH0317EJ0004 Rev. 0.04 1302 Feb. 22, 2013 Necessary WAIT I/O register(SFR) name R/W Bit R/W Address READ(MIN.) READ(MAX.) WRITE(MIN.) WRITE(MAX.) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 8 16 7 6 5 4 3 2 1 0 Retry-number 2 +1 where the retry-number is calculated according F0477 C1MDB707 - E - - - - - - - - - to the following method: (Abort under radix point) For read F0478 C1MDLC07 (CAN1 message data length register 07) - E - - - - - - - - - Min. (1/fCAN) 3/ (1/fCLK) Max. (1/fCAN) 4/ (1/fCLK) F0479 C1MCONF07 (CAN1 message Configuration register 07) - E - - - - - - - - - For 8 bit-write F047A C1MIDL07 (CAN1 message ID register 07L) - - E - - - - - - - - Min. (1/fCAN) 4/ (1/fCLK) Max. (1/fCAN) 5/ (1/fCLK) F047C C1MIDH07 (CAN1 message ID register 07H) - - E - - - - - - - - For 16 bit-write Min. (1/fCAN) 2/ (1/fCLK) F047E C1MCTRL07 (CAN1 message control register 07) - - E - - - - - - - - Max. (1/fCAN) 3/ (1/fCLK) F0480 C1MDB0108 (CAN1 message data byte 01 register 08) - - E - - - - - - - - C1MDB008 - E - - - - - - - - - F0481 C1MDB108 - E - - - - - - - - - F0482 C1MDB2308 (CAN1 message data byte 23 register 08) - - E - - - - - - - - C1MDB208 - E - - - - - - - - - F0483 C1MDB308 - E - - - - - - - - - F0484 C1MDB4508 (CAN1 message data byte 45 register 08) - - E - - - - - - - - C1MDB408 - E - - - - - - - - - F0485 C1MDB508 - E - - - - - - - - - F0486 C1MDB6708 (CAN1 message data byte 67 register 08) - - E - - - - - - - - C1MDB608 - E - - - - - - - - - F0487 C1MDB708 - E - - - - - - - - - F0488 C1MDLC08 (CAN1 message data length register 08) - E - - - - - - - - - F0489 C1MCONF08 (CAN1 message Configuration register 08) - E - - - - - - - - - F048A C1MIDL08 (CAN1 message ID register 08L) - - E - - - - - - - - F048C C1MIDH08 (CAN1 message ID register 08H) - - E - - - - - - - - F048E C1MCTRL08 (CAN1 message control register 08) - - E - - - - - - - - F0490 C1MDB0109 (CAN1 message data byte 01 register 09) - - E - - - - - - - - C1MDB009 - E - - - - - - - - - F0491 C1MDB109 - E - - - - - - - - - F0492 C1MDB2309 (CAN1 message data byte 23 register 09) - - E - - - - - - - - C1MDB209 - E - - - - - - - - - F0493 C1MDB309 - E - - - - - - - - - 1302 RL78/D1A APPENDIX A NUMBER OF WAIT CYCLES TO ACCESS I/O REGISTERS Specifications in this document are tentative and subject to change. Under development Preliminary document
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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12.5.3 Master transmission/receptio
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19.2 Configuration of DMA Controlle
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