RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 3 CPU ARCHITECTURE Table 3-6. Extended SFR (2nd SFR) List (1/26) Address Special Function Register (SFR) Name Symbol R/W Manipulable Bit Range After Reset 1-bit 8-bit 16-bit F0010H A/D converter mode register 2 ADM2 R/W 00H F0011H Conversion result comparison upper limit setting register ADUL R/W FFH F0012H Conversion result comparison lower limit setting register ADLL R/W 00H F0013H A/D test register ADTES R/W 00H F0030H Pull-up resistor option register 0 PU0 R/W 00H F0031H Pull-up resistor option register 1 PU1 R/W 00H F0033H Pull-up resistor option register 3 PU3 R/W 00H F0034H Pull-up resistor option register 4 PU4 R/W 01H F0035H Pull-up resistor option register 5 PU5 R/W 00H F0036H Pull-up resistor option register 6 PU6 R/W 00H F0037H Pull-up resistor option register 7 PU7 R/W 00H F0038H Pull-up resistor option register 8 PU8 R/W 00H F0039H Pull-up resistor option register 9 PU9 R/W 00H F003DH Pull-up resistor option register 13 PU13 R/W 00H F003EH Pull-up resistor option register 14 PU14 R/W 00H F0040H Port input mode register 0 PIM0 R/W 00H F0041H Port input mode register 1 PIM1 R/W 00H F0043H Port input mode register 3 PIM3 R/W 00H F0045H Port input mode register 5 PIM5 R/W 00H F0046H Port input mode register 6 PIM6 R/W 00H F0047H Port input mode register 7 PIM7 R/W 00H F004DH Port input mode register 13 PIM13 R/W 00H F0050H LCD port function register 0 LCDPF0 R/W 00H F0051H LCD port function register 1 LCDPF1 R/W 00H F0053H LCD port function register 3 LCDPF3 R/W 00H F0055H LCD port function register 5 LCDPF5 R/W 00H F0057H LCD port function register 7 LCDPF7 R/W 00H F0058H LCD port function register 8 LCDPF8 R/W 00H F0059H LCD port function register 9 LCDPF9 R/W 00H F005DH LCD port function register 13 LCDPF13 R/W 00H F0060H Noise filter enable register for each channel of TAU unit0 TNFEN0 R/W 00H F0061H Sampling clock select of noise filter for unit0 (2set) TNFSMP0 R/W 00H F0062H Noise filter clock select register for each channel of TAU unit0 TNFCS0 R/W 00H F0064H Noise filter enable register for each channel of TAU unit1 TNFEN1 R/W 00H F0065H Sampling clock select of noise filter for unit1 (2set) TNFSMP1 R/W 00H F0066H Noise filter clock select register for each channel of TAU unit1 TNFCS1 R/W 00H F0068H Noise filter enable register for each channel of TAU unit2 TNFEN2 R/W 00H F0069H Sampling clock select of noise filter for unit2(2set) TNFSMP2 R/W 00H F006AH Noise filter clock select register for each channel of TAU unit2 TNFCS2 R/W 00H F006EH A/D port configuration register ADPC R/W 00H F006FH Port output mode register POM R/W 00H R01UH0317EJ0004 Rev. 0.04 105 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 3 CPU ARCHITECTURE Table 3-6. Extended SFR (2nd SFR) List (2/26) Address Special Function Register (SFR) Name Symbol R/W Manipulable Bit Range After Reset 1-bit 8-bit 16-bit F0070H Timer input select register 00 TIS00 R/W 00H F0071H Timer input select register 01 TIS01 R/W 00H F0072H Timer input select register 10 TIS10 R/W 00H F0073H Timer input select register 11 TIS11 R/W 00H F0074H Timer input select register 20 TIS20 R/W 00H F0075H Timer input select register 21 TIS21 R/W 00H F0076H Timer output select register 00 TOS00 R/W 00H F0077H Timer output select register 01 TOS01 R/W 00H F0078H Illegal-memory access detection control register IAWCTL R/W 00H F0079H Timer output select register 10 TOS10 R/W 00H F007AH Timer output select register 11 TOS11 R/W 00H F007BH Timer output select register 20 TOS20 R/W 00H F007CH Timer output select register 21 TOS21 R/W 00H F0090H Data flash control register DFLCTL R/W 00H F00A0H High-speed on-chip oscillator trimming register HIOTRM R/W Undefined Note F00E0H Multiplication/division data register C (L) MDCL R/W 0000H F00E2H Multiplication/division data register C (H) MDCH R/W 0000H F00E8H Multiplication/division control register MDUC R/W 00H F00F0H Peripheral enable register 0 PER0 R/W 00H F00F1H Peripheral enable register 1 PER1 R/W 00H F00F2H Peripheral clock select register PCKSEL R/W 00H F00F3H Operation speed mode control register OSMC R/W 00H F00F5H RAM parity error control register RPECTL R/W 00H F00F8H FMP clock division selction register MDIV R/W 00H F00F9H RTC clock selection register RTCCL R/W 00H F00FAH CLM reset control flag register RESFCLM R Undefined F00FBH POC reset confirm register POCRES R/W 00H F00FCH Specific register manipulation protection register GUARD R/W 00H F00FEH BCD adjust result register BCDADJ R Undefined F0100H Serial status register 00 SSR00 R 0000H SSR00L R F0102H Serial status register 01 SSR01 R 0000H SSR01L R F0104H Serial flag clear trigger register 00 SIR00L SIR00 R/W 0000H F0106H Serial flag clear trigger register 01 SIR01L SIR01 R/W 0000H F0108H Serial mode register 00 SMR00 R/W 0020H F010AH Serial mode register 01 SMR01 R/W 0020H F010CH Serial communication operation setting register 00 SCR00 R/W 0087H F010EH Serial communication operation setting register 01 SCR01 R/W 0087H F0110H Serial channel enable status register 0 SE0L SE0 R 0000H F0112H Serial channel start trigger register 0 SS0L SS0 R/W 0000H F0114H Serial channel stop trigger register 0 ST0L ST0 R/W 0000H F0116H Serial clock select register 0 SPS0L SPS0 R/W 0000H F0118H Serial output register 0 SO0 R/W 0303H F011AH Serial output enabel register 0 Note The reset value differs for each chip. SOE0L SOE0 R/W 0000H R01UH0317EJ0004 Rev. 0.04 106 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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34.2 64-pin products 1276 R5F10CLDx
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RL78/D1A User’s Manual: Hardware
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