RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 14 CAN CONTROLLER
14.2.5 Overload frame
An overload frame is transmitted under the following conditions.
- When the receiving node has not completed the reception operation Note
- If a dominant level is detected at the first two bits during intermission
- If a dominant level is detected at the last bit (7th bit) of the end of frame or at the last bit (8th bit) of the error
delimiter/overload delimiter
Note The CAN is internally fast enough to process all received frames not generating overload frames.
Figure 14-16. Overload Frame
Overload frame
R
D
() ()
Remark D: Dominant = 0
R: Recessive = 1
6 bits 0 to 6 bits 8 bits
Interframe space or overload frame
Overload delimiter
Overload flag
Overload flag
Frame
Table 14-8. Definition of Overload Frame Fields
No Name Bit Count Definition
Overload flag 6 Outputs 6 dominant-level bits consecutively.
Overload flag from other node 0 to 6 The node that received an overload flag in the interframe
space outputs an overload flag.
Overload delimiter 8 Outputs 8 recessive-level bits consecutively.
If a dominant level is detected at the 8th bit, an overload frame
is transmitted from the next bit.
Frame – Output following an end of frame, error delimiter, or overload
delimiter.
Interframe space/overload
frame
– An interframe space or overload frame starts from here.
R01UH0317EJ0004 Rev. 0.04 796
Feb. 22, 2013