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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 6 TIMER ARRAY UNIT<br />

Figure 6-67. Block Diagram of Operation as Input Signal High-/Low-Level Width Measurement<br />

Operation clock<br />

TImn pin<br />

CKm3<br />

CKm2<br />

CKm1<br />

CKm0<br />

Edge<br />

detection<br />

Clock selection<br />

Trigger selection<br />

Remark m: Unit number (m = 0 to 2)<br />

n: Channel number (n = 0 to 7)<br />

Timer counter<br />

(TCRmn)<br />

Data register<br />

(TDRmn)<br />

Interrupt<br />

controller<br />

Interrupt signal<br />

(INTTMmn)<br />

Figure 6-68. Example of Basic Timing of Operation as Input Signal High-/Low-Level Width Measurement<br />

TSmn<br />

TEmn<br />

TImn<br />

TCRmn<br />

TDRmn<br />

INTTMmn<br />

OVF<br />

FFFFH<br />

0000H<br />

Remark m: Unit number (m = 0 to 2)<br />

n: Channel number (n = 0 to 7)<br />

0000H<br />

a<br />

a b c<br />

R01UH0317EJ0004 Rev. 0.04 425<br />

Feb. 22, 2013<br />

b<br />

c

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