RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF) 13.6 UART Buffer Mode The RL78/D1A is provided with a 9-byte transmission buffer that can be used for normal UART communication (UFnMD1, UFnMD0 = 00B). Remark n = 0, 1 R01UH0317EJ0004 Rev. 0.04 749 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF) 13.6.1 UART buffer mode transmission The following figure shows the procedure for transmitting data in UART buffer mode. Note This can be omitted. Figure 13-49. UART Buffer Mode Transmission Processing Flow START Baud rate setting (UFnCTL1 register) Transmit data level setting (UFnOPT0 register) Various mode settings (UFnOPT1 register) INTLTn timing setting (UFnOPT2 register) Various mode settings, enabling transmission (UFnCTL0 register) Writing transmit data (UFnBUF0 to UFnBUF8 registers) UFnTRQ = 1, UFnBUL3 to UFnBUL0 = XH (UFnBUCTL register) INTLTn signal generated? END Yes Read UFnSTR register Note Clear UFnBUC flag (UFnSTC register) All transmit data written? Cautions 1. Set the following values when performing BF transmission. Yes Expansion bits are disabled (UFnEBE = 0). Normal UART mode (UFnMD1, UFnMD0 = 00B). Data consistency checking is disabled (UFnDCS = 0). Waiting for buffer transmission start is disabled (UFnTW = 0). Continuation of transfer is disabled (UFnCON = 0). Request bits without responses are present (UFnNO = 0). Reception requests are disabled (UFnRRQ = 0). 2. When clearing the UFnBUC flag, be careful not to clear other reception flags. Remarks 1. See (2) of 13.11 Cautions on Use for details of starting LIN-UART. 2. X: don’t care, n = 0, 1 No No R01UH0317EJ0004 Rev. 0.04 750 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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19.2 Configuration of DMA Controlle
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RL78/D1A User’s Manual: Hardware
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