RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 8 INTERVAL TIMER
(2) RTC clock selection register (RTCCL)
Address: F00F9H After reset: 00H R/W
Figure 8-3. Format of RTC Clock Selection Register (RTCCL)
Symbol 7 6 5 4 3 2 1 0
RTCCL RTCCL7 RTCCL6 0 0 0 0 RTCCKS1 RTCCKS0
RTCCL7 Operation clock source selection for RTC/interval timer
0 RTC/interval timer uses External Main clock (fMX)
1 RTC/interval timer uses High-speed on-chip oscillator clock (fIH)
RTCCKS1 RTCCKS0 RTCCL6 Operation selection of RTC macro and interval timer
0 0 0/1 Sub clock (fSUB)
0 1
Low-speed on-chip oscillator clock (fIL, 15K@typ)
(WUTMMCK0 should be “1” to use this selection)
1 0 0 External Main or High-speed on-chip oscillator clock
(after selected by RTCCL7)/2 7
1 1 0 External Main or High-speed on-chip oscillator clock
(after selected by RTCCL7)/2 8
1 0 1 External Main or High-speed on-chip oscillator clock
(after selected by RTCCL7)/122
1 1 1 External Main or High-speed on-chip oscillator clock
(after selected by RTCCL7)/244
Caution WUTMMCK0 should be set to “1” when fIL is used for RTC/interval timer clock.
R01UH0317EJ0004 Rev. 0.04 486
Feb. 22, 2013