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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF)<br />

(12) LIN-UARTn 8-bit wait transmit data register (UFnWTXB)<br />

The UFnWTXB register is an 8-bit register dedicated to delaying starting transmission until the stop bit of reception<br />

is completed during a LIN communication.<br />

This register is write-only, in 8-bit units.<br />

The stop bit length of reception when reception is switched to transmission is guaranteed for the UFnWTXB<br />

register.<br />

See 13.5.11 Transmission start wait function for details.<br />

The UFnTX register value will be read when the UFnWTXB register has been read.<br />

Reset input sets this register to 00H.<br />

Figure 13-12. Format of LIN-UARTn 8-bit Wait Transmit Data Register (UFnWTXB)<br />

Address: F024AH (UF0WTXB), F026AH (UF1WTXB) After reset: 00H W<br />

7 6 5 4 3 2 1 0<br />

UFnWTXB UFnWTX7 UFnWTX6 UFnWTX5 UFnWTX4 UFnWTX3 UFnWTX2 UFnWTX1 UFnWTX0<br />

(n = 0, 1)<br />

Cautions 1. Writing to the UFnWTXB register is prohibited other than when reception is switched to<br />

transmission (such as during transmission).<br />

2. When the UFnWTXB register is accessed in 8-bit units (when the UFnWTXB register is<br />

accessed), “0” is written to the UFnWTX8 bit of UFnWTX register.<br />

3. Writing to the UFnWTXB register is prohibited when using the UFnBUF0 to UFnBUF8<br />

registers.<br />

Remark The UFnWTX8 bit is an expansion bit when expansion bits are enabled (UFnEBE = UFnCL = 1).<br />

R01UH0317EJ0004 Rev. 0.04 706<br />

Feb. 22, 2013

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