RL78/D1A User's Manual: Hardware - Renesas

R01UH0317EJ0004 Rev. 0.04 1297
Feb. 22, 2013
Necessary WAIT I/O register(SFR) name R/W Bit R/W
Address
READ(MIN.) READ(MAX.) WRITE(MIN.) WRITE(MAX.)
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 8 16 7 6 5 4 3 2 1 0
3 3 3 3 F0346 C1GMABT (CAN1 global block transmission controlregister) - - E - - - - - - - -
3 3 3 3 F0348 C1GMABTD (CAN1 global block transmission delay setting register) - E - - - - - - - - -
3 3 3 3 F0380 C1MASK1L (CAN1 module mask 1 register L) - - E - - - - - - - -
3 3 3 3 F0382 C1MASK1H (CAN1 module mask 1 register H) - - E - - - - - - - -
3 3 3 3 F0384 C1MASK2L (CAN1 module mask 2 register L) - - E - - - - - - - -
3 3 3 3 F0386 C1MASK2H (CAN1 module mask 2 register H) - - E - - - - - - - -
3 3 3 3 F0388 C1MASK3L (CAN1 module mask 3 register L) - - E - - - - - - - -
3 3 3 3 F038A C1MASK3H (CAN1 module mask 3 register H) - - E - - - - - - - -
3 3 3 3 F038C C1MASK4L (CAN1 module mask 4 register L) - - E - - - - - - - -
3 3 3 3 F038E C1MASK4H (CAN1 module mask 4 register H) - - E - - - - - - - -
3 3 3 3 F0390 C1CTRL (CAN1 module control register) - - E - - - - - - - -
3 3 3 3 F0392 C1LEC (CAN1 module last error information registe) - E - - - - - - - - -
3 3 3 3 F0393 C1INFO (CAN1 module information register) - R - - - - - - - - -
3 3 3 3 F0394 C1ERC (CAN1 module error counter register) - - R - - - - - - - -
3 3 3 3 F0396 C1IE (CAN1 module interrupt enable register) - - E - - - - - - - -
3 3 3 3 F0398 C1INTS (CAN1 module interrupt status register) - - E - - - - - - - -
3 3 3 3 F039A C1BRP (CAN1 module bit rate prescaler register) - E - - - - - - - - -
3 3 3 3 F039C C1BTR (CAN1 module bit rate register) - - E - - - - - - - -
3 3 3 3 F039E C1LIPT (CAN1 module last in-pointer register) - R - - - - - - - - -
Retry-number 2 +1
where the retry-number is calculated according
F03A0 C1RGPT (CAN1 module receive history list register) - - E - - - - - - - -
to the following method: (Abort under radix point)
For read
F03A2 C1LOPT (CAN1 module last out-pointer register) - R - - - - - - - - -
Min. (1/fCAN) 3/ (1/fCLK)
F03A4 C1TGPT (CAN1 module transmit history list register) - - E - - - - - - - -
Max. (1/fCAN) 4/ (1/f CLK)
F03A6 C1TS (CAN1 module time stamp register) - - E - - - - - - - -
Retry-number 2 +1
where the retry-number is calculated according
F0400 C1MDB0100 (CAN1 message data byte 01 register 00) - - E - - - - - - - -
to the following method: (Abort under radix point)
For read
C1MDB000 - E - - - - - - - - -
Min. (1/fCAN) 3/ (1/fCLK)
F0401 C1MDB100 - E - - - - - - - - -
Max. (1/fCAN) 4/ (1/fCLK)
For 8 bit-write
F0402 C1MDB2300 (CAN1 message data byte 23 register 00) - - E - - - - - - - -
Min. (1/fCAN) 4/ (1/fCLK)
Max. (1/fCAN) 5/ (1/fCLK)
C1MDB200 - E - - - - - - - - -
For 16 bit-write
F0403 C1MDB300 - E - - - - - - - - -
Min. (1/fCAN) 2/ (1/fCLK)
Max. (1/fCAN) 3/ (1/fCLK)
F0404 C1MDB4500 (CAN1 message data byte 45 register 00) - - E - - - - - - - -
C1MDB400 - E - - - - - - - - -
1297
RL78/D1A APPENDIX A NUMBER OF WAIT CYCLES TO ACCESS I/O REGISTERS
Specifications in this document are tentative and subject to change.
Under development Preliminary document