RL78/D1A User's Manual: Hardware - Renesas

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R01UH0317EJ0004 Rev. 0.04 1293 Feb. 22, 2013 Necessary WAIT I/O register(SFR) name R/W Bit R/W Address READ(MIN.) READ(MAX.) WRITE(MIN.) WRITE(MAX.) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 8 16 7 6 5 4 3 2 1 0 - - - - F0238 - - - - F023A - - - - F023C - - - - F023E - - - - F0240 - - - - F0241 TO2 (Timer output register 2) - - E - - - - - - - - TO2L - E - - - - - - - - - TOE2 (Timer output enable register 2) - - E - - - - - - - - TOE2L E E - E E E E E E E E TOE2_7 TOE2_6 TOE2_5 TOE2_4 TOE2_3 TOE2_2 TOE2_1 TOE2_0 E E E E E E E E TOL2 (Timer output level register 2) - - E - - - - - - - - TOL2L - E - - - - - - - - - TOM2 (Timer output mode register 2) - - E - - - - - - - - TOM2L - E - - - - - - - - - UF0CTL0 (LIN-UART0 control register 0) E E - R E E E E E E E UF0TXE UF0RXE UF0DIR UF0PS1 UF0PS0 UF0CL UF0SL - E E E E E E E UF0OPT0 (LIN-UART0 option control register 0) E E - R E E E E E E E UF0BRF UF0BRT UF0BTT UF0BLS2 UF0BLS1 UF0BLS0 UF0TDL UF0RDL R E E E E E E E - - - - F0242 UF0CTL1 (LIN-UART0 control register 1) - - E - - - - - - - - - - - - F0244 - - - - F0245 UF0OPT1 (LIN-UART0 option control register 1) E E - E E E E E E E E UF0EBE UF0EBL UF0EBC UF0IPCS UF0ACE UF0MD1 UF0MD0 UF0DCS E E E E E E E E UF0OPT2 (LIN-UART0 option control register 2) E E - R R R R R R E E UF0RXFL UF0ITS - - - - - - E E - - - - F0246 UF0STR (LIN-UART0 status register) - - R - - - - - - - - - - - - F0248 UF0STC (LIN-UART0 status clear register) - - E - - - - - - - - - - - - F024A UF0WTX (LIN-UART0 wait transmit data register) - - E - - - - - - - - UF0WTXB (LIN-UART0 8-bit wait transmit data register ) - E - - - - - - - - - - - - - F024E UF0ID (LIN-UART0 ID setting register) - E - - - - - - - - - - - - - F024F UF0BUF0 (LIN-UART0 buffer register 0) - E - - - - - - - - - - - - - F0250 UF0BUF1 (LIN-UART0 buffer register 1) - E - - - - - - - - - - - - - F0251 UF0BUF2 (LIN-UART0 buffer register 2) - E - - - - - - - - - - - - - F0252 UF0BUF3 (LIN-UART0 buffer register 3) - E - - - - - - - - - - - - - F0253 UF0BUF4 (LIN-UART0 buffer register 4) - E - - - - - - - - - - - - - F0254 UF0BUF5 (LIN-UART0 buffer register 5) - E - - - - - - - - - - - - - F0255 UF0BUF6 (LIN-UART0 buffer register 6) - E - - - - - - - - - - - - - F0256 UF0BUF7 (LIN-UART0 buffer register 7) - E - - - - - - - - - 1293 RL78/D1A APPENDIX A NUMBER OF WAIT CYCLES TO ACCESS I/O REGISTERS Specifications in this document are tentative and subject to change. Under development Preliminary document
R01UH0317EJ0004 Rev. 0.04 1294 Feb. 22, 2013 Necessary WAIT I/O register(SFR) name R/W Bit R/W Address READ(MIN.) READ(MAX.) WRITE(MIN.) WRITE(MAX.) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 8 16 7 6 5 4 3 2 1 0 - - - - F0257 UF0BUF8 (LIN-UART0 buffer register 8) - E - - - - - - - - - - - - - F0258 UF0BUCTL (LIN-UART0 buffer control register) - - E - - - - - - - - - - - - F0260 - - - - F0261 UF1CTL0 (LIN-UART1 control register 0) E E - R E E E E E E E UF1TXE UF1RXE UF1DIR UF1PS1 UF1PS0 UF1CL UF1SL - E E E E E E E UF1OPT0 (LIN-UART1 option control register 0) E E - R E E E E E E E UF1BRF UF1BRT UF1BTT UF1BLS2 UF1BLS1 UF1BLS0 UF1TDL UF1RDL R E E E E E E E - - - - F0262 UF1CTL1 (LIN-UART1 control register 1) - - E - - - - - - - - - - - - F0264 - - - - F0265 UF1OPT1 (LIN-UART1 option control register 1) E E - E E E E E E E E UF1EBE UF1EBL UF1EBC UF1IPCS UF1ACE UF1MD1 UF1MD0 UF1DCS E E E E E E E E UF1OPT2 (LIN-UART0 option control register 2) E E - R R R R R R E E UF1RXFL UF1ITS - - - - - - E E - - - - F0266 UF1STR (LIN-UART1 status register) - - R - - - - - - - - - - - - F0268 UF1STC (LIN-UART1 status clear register) - - E - - - - - - - - - - - - F026A UF1WTX (LIN-UART1 wait transmit data register) - - E - - - - - - - - UF1WTXB (LIN-UART1 8-bit wait transmit data register ) - E - - - - - - - - - - - - - F026E UF1ID (LIN-UART1 ID setting register) - E - - - - - - - - - - - - - F026F UF1BUF0 (LIN-UART1 buffer register 0) - E - - - - - - - - - - - - - F0270 UF1BUF1 (LIN-UART1 buffer register 1) - E - - - - - - - - - - - - - F0271 UF1BUF2 (LIN-UART1 buffer register 2) - E - - - - - - - - - - - - - F0272 UF1BUF3 (LIN-UART1 buffer register 3) - E - - - - - - - - - - - - - F0273 UF1BUF4 (LIN-UART1 buffer register 4) - E - - - - - - - - - - - - - F0274 UF1BUF5 (LIN-UART1 buffer register 5) - E - - - - - - - - - - - - - F0275 UF1BUF6 (LIN-UART1 buffer register 6) - E - - - - - - - - - - - - - F0276 UF1BUF7 (LIN-UART1 buffer register 7) - E - - - - - - - - - - - - - F0277 UF1BUF8 (LIN-UART1 buffer register 8) - E - - - - - - - - - - - - - F0278 UF1BUCTL (LIN-UART1 buffer control register) - - E - - - - - - - - 1 1 7 7 F0280 SG0FL (Frequency register SG0FL) - - E - - - - - - - - 1 1 7 7 F0282 SG0FH (Frequency register SG0FH) - - E - - - - - - - - 1 1 7 7 F0284 SG0PWM (Amplitude register) - - E - - - - - - - - 1 1 1 1 F0286 SG0SDF (Duration factor register) - E - - - - - - - - - 1294 RL78/D1A APPENDIX A NUMBER OF WAIT CYCLES TO ACCESS I/O REGISTERS Specifications in this document are tentative and subject to change. Under development Preliminary document
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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