RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF) 13.5.4 BF transmission/reception format The RL78/D1A has a BF (Break Field) transmission/reception control function to enable use of the LIN (Local Interconnect Network) function. LIN-bus LTxDn (output) INTLTn interrupt (UFnITS = 0) Wake-up signal frame Note 3 8 bits Figure 13-28. LIN Transmission Manipulation Outline Note 1 Break field Note 2 13 bits Note 4 BF transmission Sync field 55H transmission Protected identifier field Data transmission R01UH0317EJ0004 Rev. 0.04 725 Feb. 22, 2013 DATA field Data transmission DATA field Data transmission Check SUM field Data transmission Notes 1. The interval between each field is controlled by software. 2. BF output is performed by hardware. The output width is the bit length set by the UFnBLS2 to UFnBLS0 bits of the UFnOPT0 register. If even finer output width adjustments are required, such adjustments can be performed using the UFnBRS11 to UFnBRS0 bits of the UFnCTL1 register. 3. 80H transfer in the 8-bit mode or BF transmission is substituted for the wakeup signal. 4. A transmission enable interrupt request signal (INTLTn) is output at the start of each transmission. The INTLTn signal is also output at the start of each BF transmission. Be sure to clear UFnOPT2.UFnITS to “0” when starting a transmission, so that a transmission interrupt is generated. Remarks 1. Figure 13-28 shows the LIN transmission manipulation outline when in BF reception enable mode during communication (UFnMD1, UFnMD0 = 10B). See 13.7 LIN Communication Automatic Baud Rate Mode for when in automatic baud rate mode (UFnMD1, UFnMD0 = 11B). 2. n = 0, 1
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF) LIN-bus LRxDn (input) Edge detection (INTPLRn) Disable Wake-up signal frame Figure 13-29. LIN Reception Manipulation Outline Enable Reception interrupt (INTLRn) Status interrupt (INTLSn) Note 1 Capture timer Disable Break field Note 2 13 bits BF reception Note 3 Note 3 Sync field SF reception PID reception Enable Note 4 Protected identifier field Data reception Data reception Note 5 Data reception Notes 1. A wakeup signal is detected by detecting the interrupt edge of a pin (INTPLRn). After having received the wakeup signal, enable LIN-UARTn, enable reception operation, and set the BF reception trigger bit. 2. If a BF reception of at least 11 bits is detected, the BF reception is judged to be ended normally. A status interrupt request signal (INTLSn) is generated in BF reception enable mode during communication (UFnMD1, UFnMD0 = 10B). If the received BF is less than 11 bits, the reception is judged to be a BF reception error and the operation is returned to a successful BF reception wait state (UFnBRF = 1) without outputting an interrupt signal. 3. When BF reception has ended normally, a status interrupt request signal (INTLSn) is generated in BF reception enable mode during communication (UFnMD1, UFnMD0 = 10B), and a successful BF reception flag (UFnBSF) is set. When the BF reception flag (UFnBRF) is “1”, detection of overrun, parity, and framing errors (UFnOVE, UFnPE, UFnFE) is not performed during BF reception. Moreover, data transfer from the receive shift register to the receive data register (UFnRX) is also not performed. At this time, UFnRX retains the previous value. 4. Connect the LRxDn pin to the TI (capture input) of the timer array unit. Enable the timer by using a BF reception complete interrupt, measure the baud rate from the SF transfer data, and calculate the baud rate error. Set a reception state by stopping the LIN-UARTn reception operation after SF reception and re-setting the value of LIN-UARTn control register 1 (UFnCTL1) obtained by correcting the baud rate error. 5. Classification of a checksum field is performed by using software. The processing that initializes LIN-UARTn after CSF reception and sets to a successful BF reception wait state (UFnBRF = 1) again is also performed by using software. In BF reception enable mode during communication (UFnMD1, UFnMD0 = 10B), however, BF reception can be automatically performed without setting to a successful BF reception wait state (UFnBRF = 1) again. (Remarks are given on the next page.) R01UH0317EJ0004 Rev. 0.04 726 Feb. 22, 2013 DATA field DATA field Check SUM field
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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RL78/D1A User’s Manual: Hardware
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