RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 26 REGULATOR 26.1 Regulator Overview CHAPTER 26 REGULATOR The RL78/D1A contains a circuit for operating the device with a constant voltage. At this time, in order to stabilize the regulator output voltage, connect the REGC pin to VSS via a capacitor (0.47 to 1 F). Also, use a capacitor with good characteristics, since it is used to stabilize internal voltage. REGC Caution Keep the wiring length as short as possible for the broken-line part in the above figure. The regulator output voltage, see table 26-1. R01UH0317EJ0004 Rev. 0.04 1151 Feb. 22, 2013 VSS Table 26-1. Regulator Output Voltage Conditions Mode Output Voltage Condition High-speed main mode 1.8 V In STOP mode When both the high-speed system clock (fMX) and the high-speed on-chip oscillator clock (fIH) are stopped during CPU operation with the subsystem clock (fXT) When both the high-speed system clock (fMX) and the high-speed on-chip oscillator clock (fIH) are stopped during the HALT mode when the CPU operation with the subsystem clock (fXT) has been set 2.1 V Other than above (include during OCD mode) Note Note When it shifts to the subsystem clock operation or STOP mode during the on-chip debugging, the regulator output voltage is kept at 2.1 V (not decline to 1.8 V).
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 27 OPTION BYTE 27.1 Functions of Option Bytes CHAPTER 27 OPTION BYTE Addresses 000C0H to 000C3H of the flash memory of the RL78/D1A form an option byte area. Option bytes consist of user option byte (000C0H to 000C2H) and on-chip debug option byte (000C3H). Upon power application or resetting and starting, an option byte is automatically referenced and a specified function is set. When using the product, be sure to set the following functions by using the option bytes. To use the boot swap operation during self programming, 000C0H to 000C3H are replaced by 020C0H to 020C3H. Therefore, set the same values as 000C0H to 000C3H to 020C0H to 020C3H. 27.1.1 User option byte (000C0H to 000C2H/020C0H to 020C2H) (1) 000C0H/020C0H Operation of watchdog timer Operation is stopped or enabled in the HALT or STOP mode. Setting of interval time of watchdog timer Operation of watchdog timer Operation is stopped or enabled. Setting of window open period of watchdog timer Setting of interval interrupt of watchdog timer Used or not used Caution Set the same value as 000C0H to 020C0H when the boot swap operation is used because 000C0H is replaced by 020C0H. (2) 000C1H/020C1H Setting of LVD operation mode Interrupt & reset mode. Reset mode. Interrupt mode. Setting of LVD detection level (VLVDH, VLVDL, VLVD) Caution Set the same value as 000C1H to 020C1H when the boot swap operation is used because 000C1H is replaced by 020C1H. R01UH0317EJ0004 Rev. 0.04 1152 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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RL78/D1A User’s Manual: Hardware
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RL78/D1A User's Manual: Hardware - Renesas

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