RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF)
CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF)
In the RL78/D1A, two asynchronous serial interface LIN-UART (UARTF) are provided.
13.1 Features
Maximum transfer rate: 1 Mbps (using dedicated baud rate generator)
Full-duplex communication: Internal LIN-UART receive data register n (UFnRX)
Internal LIN-UART transmit data register n (UFnTX)
2-pin configuration: LTxDn: Transmit data output pin
LRxDn: Receive data input pin
Reception error detection function
Parity error
Framing error
Overrun error
Function to detect consistency errors in LIN communication data
Function to detect successful BF reception
ID parity error
Checksum error
Response preparation error
ID match function
Expansion bit detection function
Interrupt sources: 3
Reception complete interrupt (INTLRn)
Transmission interrupt (INTLTn)
Status interrupt (INTLSn)
Character length: 7, 8 bits
Communication with 9-bit data length possible by expansion bit setting
When an expansion bit is at the expected level, the received data can be compared with 8-bit data set in a
register in advance
Internal 3-bit prescaler
Parity function: Odd, even, 0, none
Transmission stop bit: 1, 2 bits
On-chip dedicated baud rate generator
MSB-/LSB-first transfer selectable
Transmit/receive data inverted input/output possible
Guarantee for stop bit of reception (suspension of transmission start during stop bit of reception when starting
transmission possible)
Remark n = 0, 1
R01UH0317EJ0004 Rev. 0.04 681
Feb. 22, 2013