RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 6 TIMER ARRAY UNIT (12) Noise filter enable registers 0 to 2 (TNFEN0 to TNFEN2) TNFEN0 is used to set for each channel whether the noise filter can be used for the input signal from the timer input pin of timer array unit 0. TNFEN1 is used to set for each channel whether the noise filter can be used for the input signal from the timer input pin of timer array unit 1. TNFEN2 is used to set for each channel whether the noise filter can be used for the input signal from the timer input pin of timer array unit 2. Enable the noise filter by setting the corresponding bits to 1 on the pins in need of noise removal. When the noise filter is ON, it detects the correspondence between the 2 clocks with the CPU/peripheral hardware clock (fMCK), and synchronizes them. When the noise filter is OFF, only synchronization is performed with the CPU/peripheral hardware clock (fMCK). TNFEN0 to TNFEN2 can be set by a 1-bit or 8-bit memory manipulation instruction. Reset signal generation clears these registers to 00H. R01UH0317EJ0004 Rev. 0.04 349 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 6 TIMER ARRAY UNIT Figure 6-25. Format of Noise Filter Enable Register 0 (TNFEN0) Address: F0060H After reset: 00H R/W Symbol 7 6 5 4 3 2 1 0 TNFEN0 TNFEN07 TNFEN06 TNFEN05 TNFEN04 TNFEN03 TNFEN02 TNFEN01 TNFEN00 TNFEN07 Enable/disable using noise filter of TI07 pin input signal 0 Noise filter OFF 1 Noise filter ON TNFEN06 Enable/disable using noise filter of TI06 pin input signal 0 Noise filter OFF 1 Noise filter ON TNFEN05 Enable/disable using noise filter of TI05 pin input signal 0 Noise filter OFF 1 Noise filter ON TNFEN04 Enable/disable using noise filter of TI04 pin input signal 0 Noise filter OFF 1 Noise filter ON TNFEN03 Enable/disable using noise filter of TI03 pin input signal 0 Noise filter OFF 1 Noise filter ON TNFEN02 Enable/disable using noise filter of TI02 pin input signal 0 Noise filter OFF 1 Noise filter ON TNFEN01 Enable/disable using noise filter of TI01 pin input signal 0 Noise filter OFF 1 Noise filter ON TNFEN00 Enable/disable using noise filter of TI00 pin input signal 0 Noise filter OFF 1 Noise filter ON Remark The pins mounted differ depending on the product. See 6.3 (13) Timer input select registers 0, 1 (TIS0, TIS1) for details. R01UH0317EJ0004 Rev. 0.04 350 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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34.2 64-pin products 1276 R5F10CLDx
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RL78/D1A User’s Manual: Hardware
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