RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 14 CAN CONTROLLER (4) CAN global automatic block transmission control register (C0GMABT, C1GMABT) The C0GMABT, C1GMABT register is used to control the automatic block transmission (ABT) operation. (a) Read (b) Write (a) Read Figure 14-28. Format of CAN Global Automatic Block Transmission Control Register (C0GMABT, C1GMABT) (1/2) Address: F05C6H (C0GMABT), F0346H (C1GMABT) After reset: 0000H R/W C0GMABT, C1GMABT C0GMABT, C1GMABT 15 14 13 12 11 10 9 8 0 0 0 0 0 0 0 0 7 6 5 4 3 2 1 0 0 0 0 0 0 0 ABTCLR ABTTRG 15 14 13 12 11 10 9 8 0 0 0 0 0 0 Set Set ABTCLR ABTTRG 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 Clear ABTTRG Caution Before changing the normal operation mode with ABT to the initialization mode, be sure to set the C0GMABT, C1GMABT register to the default value (0000H) and confirm the C0GMABT, C1GMABT register is surely initialized to the default value (0000H). ABTCLR Automatic Block Transmission Engine Clear Status Bit 0 Clearing the automatic transmission engine is completed. 1 The automatic transmission engine is being cleared. Remarks 1. Set the ABTCLR bit to 1 while the ABTTRG bit is cleared (0). The operation is not guaranteed if the ABTCLR bit is set to 1 while the ABTTRG bit is set to 1. 2. When the automatic block transmission engine is cleared by setting the ABTCLR bit to 1, the ABTCLR bit is automatically cleared to 0 as soon as the requested clearing processing is complete. R01UH0317EJ0004 Rev. 0.04 847 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 14 CAN CONTROLLER (b) Write Figure 14-28. Format of CAN Global Automatic Block Transmission Control Register (C0GMABT, C1GMABT) (2/2) ABTTRG Automatic Block Transmission Status Bit 0 Automatic block transmission is stopped. 1 Automatic block transmission is under execution. Caution Do not set the ABTTRG bit (ABTTRG = 1) in the initialization mode. If the ABTTRG bit is set in the initialization mode, the operation is not guaranteed after the CAN module has entered the normal operation mode with ABT. Do not set the ABTTRG bit (1) while the C0CTRL.TSTAT.TSTAT, C1CTRL.TSTAT bit is set (1). Confirm TSTAT = 0 directly in advance before setting ABTTRG bit. Set ABTCLR Automatic Block Transmission Engine Clear Request Bit 0 The automatic block transmission engine is in idle state or under operation. 1 Request to clear the automatic block transmission engine. After the automatic block transmission engine has been cleared, automatic block transmission is started from message buffer 0 by setting the ABTTRG bit to 1. Set ABTTRG Clear ABTTRG Automatic Block Transmission Start Bit 0 1 Request to stop automatic block transmission. 1 0 Request to start automatic block transmission. Other than above No change in ABTTRG bit. Caution While receiving a message from another node or transmitting the messages other than the ABT messages (message buffer 8 to 15), there is a possibility not to begin immediately the transmission even if the ABTTRG bit is set to 1. Transmission is not aborted even if the ABTTRG bit is cleared to 0, until the transmission of the ABT message, which is currently being transmitted is completed (successfully or not). After that, the transmission is aborted. R01UH0317EJ0004 Rev. 0.04 848 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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RL78/D1A User’s Manual: Hardware
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