RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 32 ELECTRICAL SPECIFICATIONS (J GRADE PRODUCT) (TARGET)
32.4 DC characteristics
32.4.1 Pin group 1
TA = -40 to +85 C, 4.0 VVDD = EVDD0 = EVDD1 5.5 V, VSS = EVSS0 = EVSS1 = 0 V
Parameter Symbols Conditions Min. Typ. Max. Unit
IOH1 Per pin -5.0 mA
IOH2 Per pin, P73 or P135 (SG port) -13.0 mA
Total
Group 1L -40.0 mA
(When duty = Group 1R -40.0 mA
70%) Note 2 Output current,
Note 1
high
IOHTOTAL
Group 1C (100 pin) -30.0 mA
for 100 pin -110.0 mA
for 80 pin, 64 pin, 48 pin -60.0 mA
IOL1 Per pin 8.5 mA
IOL2 Per pin, P73 or P135 (SG ports) 13.0 mA
Total
Group 1L 40.0 mA
(When duty = Group 1R 35.0 mA
70%) Note 2 Output current, low
IOLTOTAL
Group 1C (100 pin) 40.0 mA
for 100 pin 115.0 mA
for 80 pin, 64 pin, 48pin 60.0 mA
Note 3
Input voltage, high VIH1 Schmitt3 mode 0.8VDD VDD V
VIH2 Schmitt1 mode Note 4 0.65VDD VDD V
Note 3
Input voltage, low VIL1 Schmitt3 mode 0 0.5VDD V
VIL2 Schmitt1 mode Note 4 0 0.35VDD V
Input hysteresis width VIHYS1 Schmitt3 mode 0.1 0.19 0.29 V
Note 3, 5
VIHYS2 Schmitt1 mode Note 4 0.15 0.59 0.84 V
Note 1
Output voltage, high VOH1 IOH = -5.0 mA VDD-1.0 VDD V
IOH = -3.0 mA up to 6 pins VDD-0.5 VDD V
VOH2 IOH = -13.0 mA, P73 or P135 (SG port) VDD-0.7 VDD V
Output voltage, low VOL1 IOL = 8.5 mA 0 0.7 V
IOL = 3.0 mA up to 6 pins 0 0.5 V
VOL2 IOL = 13.0 mA, P73 or P135 (SG port) 0 0.7 V
Input leakage current,
high
ILIH1 VI = VDD 1 A
Input leakage current,
low
On chip pull-up
Note 6
resistance
On chip pull-down
Note 7
resistance
ILIL1 VI = VSS -1 A
RU VI = VSS 10 20 100 k
RD VI = VDD 100 k
Notes 1. When P60 or P61 is set to Nch open drain mode, it does not drive high level output.
2. Total current should be decreased when duty is more than 70%. However, total current cannot be
increased even if duty is less than 70% to keep VOH/VOL specification.
3. Except P130 because it is output only port.
4. P01, P10, P11, P17, P50 to P52, P54 to P57, P61, P63, P70, P135 only.
5. This value is defined by evaluation result.
6. Except P130 and P137. Pull-up resistance is connected by software when pin is set to input mode.
7. LCD segment shared pins only. Pull-down resistance is connected during reset.
R01UH0317EJ0004 Rev. 0.04 1218
Feb. 22, 2013