RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF)
Figure 13-7. Format of LIN-UARTn Status Register (UFnSTR) (6/6)
UFnFE Framing error flag
0 No framing error has occurred.
1 A framing error has occurred.
< Framing error source>
When no stop bit is detected during reception
Only the first bit of the receive data stop bits is checked, regardless of the setting value of the
UFnSL bit.
The UFnFE bit will not be cleared until “1” is written to the UFnCLFE bit of the UFnSTC register or
“0” is written to the UFnRXE bit of the UFnCTL0 register, because the UFnFE bit is a cumulative
flag.
UFnOVE Overrun error flag
0 No overrun error has occurred.
1 An overrun error has occurred.
< Overrun error source>
When receive data has been stored into the UFnRX register and the next receive
operation is completed before that receive data has been read
When an overrun error has occurred, the data is discarded without the next receive data being
written to the UFnRX register.
The UFnFE bit will not be cleared until “1” is written to the UFnCLFE bit of the UFnSTC register or
“0” is written to the UFnRXE bit of the UFnCTL0 register, because the UFnFE bit is a cumulative
flag. It will not be set in automatic baud rate mode (UFnMD1, UFnMD0 = 11B).
Caution If no status interrupt due to an ID mismatch is issued while expansion bit data
comparison is enabled (UFnEBE = 1 and UFnEBC = 1), as receive data will not be
stored in the UFnRXT register, the UFnOVE flag will not be set even if the receive
data is not read. Furthermore, when transmitting in automatic baud rate mode, the
receive data will be always stored in the UFnRX register, but the UFnOVE flag will
not be set even if the receive data is not read.
R01UH0317EJ0004 Rev. 0.04 700
Feb. 22, 2013