RL78/D1A User's Manual: Hardware - Renesas

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R01UH0317EJ0004 Rev. 0.04 1313 Feb. 22, 2013 Necessary WAIT I/O register(SFR) name R/W Bit R/W Address READ(MIN.) READ(MAX.) WRITE(MIN.) WRITE(MAX.) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 8 16 7 6 5 4 3 2 1 0 Retry-number 2 +1 where the retry-number is calculated according F068E C0MCTRL08 (CAN0 message control register 08) - - E - - - - - - - - to the following method: (Abort under radix point) C0MDB0109 (CAN0 message data byte 01 register 09) - - E - - - - - - - - For read F0690 Min. (1/fCAN) 3/ (1/fCLK) C0MDB009 - E - - - - - - - - - Max. (1/fCAN) 4/ (1/fCLK) For 8 bit-write F0691 C0MDB109 - E - - - - - - - - - Min. (1/fCAN) 4/ (1/fCLK) C0MDB2309 (CAN0 message data byte 23 register 09) - - E - - - - - - - - Max. (1/fCAN) 5/ (1/fCLK) F0692 For 16 bit-write C0MDB209 - E - - - - - - - - - Min. (1/fCAN) 2/ (1/fCLK) Max. (1/fCAN) 3/ (1/fCLK) F0693 C0MDB309 - E - - - - - - - - - F0694 C0MDB4509 (CAN0 message data byte 45 register 09) - - E - - - - - - - - C0MDB409 - E - - - - - - - - - F0695 C0MDB509 - E - - - - - - - - - F0696 C0MDB6709 (CAN0 message data byte 67 register 09) - - E - - - - - - - - C0MDB609 - E - - - - - - - - - F0697 C0MDB709 - E - - - - - - - - - F0698 C0MDLC09 (CAN0 message data length register 09) - E - - - - - - - - - F0699 C0MCONF09 (CAN0 message Configuration register 09) - E - - - - - - - - - F069A C0MIDL09 (CAN0 message ID register 09L) - - E - - - - - - - - F069C C0MIDH09 (CAN0 message ID register 09H) - - E - - - - - - - - F069E C0MCTRL09 (CAN0 message control register 09) - - E - - - - - - - - F06A0 C0MDB0110 (CAN0 message data byte 01 register 10) - - E - - - - - - - - C0MDB010 - E - - - - - - - - - F06A1 C0MDB110 - E - - - - - - - - - F06A2 C0MDB2310 (CAN0 message data byte 23 register 10) - - E - - - - - - - - C0MDB210 - E - - - - - - - - - F06A3 C0MDB310 - E - - - - - - - - - F06A4 C0MDB4510 (CAN0 message data byte 45 register 10) - - E - - - - - - - - C0MDB410 - E - - - - - - - - - F06A5 C0MDB510 - E - - - - - - - - - F06A6 C0MDB6710 (CAN0 message data byte 67 register 10) - - E - - - - - - - - C0MDB610 - E - - - - - - - - - F06A7 C0MDB710 - E - - - - - - - - - F06A8 C0MDLC10 (CAN0 message data length register 10) - E - - - - - - - - - 1313 RL78/D1A APPENDIX A NUMBER OF WAIT CYCLES TO ACCESS I/O REGISTERS Specifications in this document are tentative and subject to change. Under development Preliminary document
R01UH0317EJ0004 Rev. 0.04 1314 Feb. 22, 2013 Necessary WAIT I/O register(SFR) name R/W Bit R/W Address READ(MIN.) READ(MAX.) WRITE(MIN.) WRITE(MAX.) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 8 16 7 6 5 4 3 2 1 0 Retry-number 2 +1 where the retry-number is calculated according F06A9 C0MCONF10 (CAN0 message Configuration register 10) - E - - - - - - - - - to the following method: (Abort under radix point) For read F06AA C0MIDL10 (CAN0 message ID register 10L) - - E - - - - - - - - Min. (1/fCAN) 3/ (1/fCLK) F06AC C0MIDH10 (CAN0 message ID register 10H) - - E - - - - - - - - Max. (1/fCAN) 4/ (1/fCLK) For 8 bit-write F06AE C0MCTRL10 (CAN0 message control register 10) - - E - - - - - - - - Min. (1/fCAN) 4/ (1/fCLK) C0MDB0111 (CAN0 message data byte 01 register 11) - - E - - - - - - - - Max. (1/fCAN) 5/ (1/fCLK) F06B0 For 16 bit-write C0MDB011 - E - - - - - - - - - Min. (1/fCAN) 2/ (1/fCLK) Max. (1/fCAN) 3/ (1/fCLK) F06B1 C0MDB111 - E - - - - - - - - - F06B2 C0MDB2311 (CAN0 message data byte 23 register 11) - - E - - - - - - - - C0MDB211 - E - - - - - - - - - F06B3 C0MDB311 - E - - - - - - - - - F06B4 C0MDB4511 (CAN0 message data byte 45 register 11) - - E - - - - - - - - C0MDB411 - E - - - - - - - - - F06B5 C0MDB511 - E - - - - - - - - - F06B6 C0MDB6711 (CAN0 message data byte 67 register 11) - - E - - - - - - - - C0MDB611 - E - - - - - - - - - F06B7 C0MDB711 - E - - - - - - - - - F06B8 C0MDLC11 (CAN0 message data length register 11) - E - - - - - - - - - F06B9 C0MCONF11 (CAN0 message Configuration register 11) - E - - - - - - - - - F06BA C0MIDL11 (CAN0 message ID register 11L) - - E - - - - - - - - F06BC C0MIDH11 (CAN0 message ID register 11H) - - E - - - - - - - - F06BE C0MCTRL11 (CAN0 message control register 11) - - E - - - - - - - - F06C0 C0MDB0112 (CAN0 message data byte 01 register 12) - - E - - - - - - - - C0MDB012 - E - - - - - - - - - F06C1 C0MDB112 - E - - - - - - - - - F06C2 C0MDB2312 (CAN0 message data byte 23 register 12) - - E - - - - - - - - C0MDB212 - E - - - - - - - - - F06C3 C0MDB312 - E - - - - - - - - - F06C4 C0MDB4512 (CAN0 message data byte 45 register 12) - - E - - - - - - - - C0MDB412 - E - - - - - - - - - F06C5 C0MDB512 - E - - - - - - - - - 1314 RL78/D1A APPENDIX A NUMBER OF WAIT CYCLES TO ACCESS I/O REGISTERS Specifications in this document are tentative and subject to change. Under development Preliminary document
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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12.5.3 Master transmission/receptio
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19.2 Configuration of DMA Controlle
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