RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 6 TIMER ARRAY UNIT Figure 6-79. Example of Set Contents of Registers When One-Shot Pulse Output Function Is Used (Slave Channel) (1/2) (a) Timer mode register mp (TMRmp) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 TMRmp CKSmp1 CKSmp0 1/0 1/0 0 CCSmp 0 MAS TERmp 0 STSmp2 STSmp1 STSmp0 CISmp1 CISmp0 1 0 0 R01UH0317EJ0004 Rev. 0.04 443 Feb. 22, 2013 0 0 0 0 MDmp3 MDmp2 MDmp1 MDmp0 Operation mode of channel p 100B: One-count mode 1 0 Start trigger during operation 0: Trigger input is invalid. Selection of TImp pin input edge 00B: Sets 00B because these are not used. Start trigger selection 100B: Selects INTTMmn of master channel. Slave/master selection 0: Channel 0 is set as slave channel. Count clock selection 0: Selects operation clock. Operation clock selection 00B: Selects CKm0 as operation clock of channel p. 01B: Selects CKm1 as operation clock of channel p. 10B: Selects CKm2 as operation clock of channel p. 11B: Selects CKm3 as operation clock of channel p. * Make the same setting as master channel. (b) Timer output register m (TOm) Bit p 0: Outputs 0 from TOmp. 1/0 1: Outputs 1 from TOmp. TOm TOmp (c) Timer output enable register m (TOEm) Bit p 0: Stops the TOmp output operation by counting operation. 1/0 1: Enables the TOmp output operation by counting operation. TOEm TOEmp Remark m: Unit number (m = 0 to 2), n: Master channel number, p: Slave channel number (p = n + 1) 0 0
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 6 TIMER ARRAY UNIT Figure 6-79. Example of Set Contents of Registers When One-Shot Pulse Output Function Is Used (Slave Channel) (2/2) (d) Timer output level register m (TOLm) Bit p 0: Positive logic output (active-high) 1/0 1: Inverted output (active-low) TOLm TOLmp (e) Timer output mode register m (TOMm) Bit p 1: Sets the combination operation mode. 1 TOMm TOMmp Remark m: Unit number (m = 0 to 2), n: Master channel number, p: Slave channel number (p = n + 1) R01UH0317EJ0004 Rev. 0.04 444 Feb. 22, 2013
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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