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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF)<br />

(17) LIN-UARTn buffer control register (UFnBUCTL)<br />

The UFnBUCTL register is a 16-bit register that controls a buffer.<br />

This register can be read or written in 16-bit units.<br />

See 13.6.1 UART buffer mode transmission and 13.7 LIN Communication Automatic Baud Rate Mode for<br />

details.<br />

Reset input sets this register to 0000H.<br />

Figure 13-17. Format of LIN-UARTn Buffer Control Register (UFnBUCTL) (1/2)<br />

Address: F0258H, F0259H (UF0BUCTL), F0278H, F0279H (UF1BUCTL) After reset: 0000H R/W<br />

15 14 13 12 11 10 9 8<br />

UFnBUCTL 0 0 0 0 0 0 UFnTW UFnCON<br />

(n = 0, 1) 7 6 5 4 3 2 1 0<br />

UFnECS UFnNO UFnRRQ UFnTRQ UFnBUL3 UFnBUL2 UFnBUL1 UFnBUL0<br />

UFnTW Transmission start wait bit<br />

0 Starts transmission immediately when buffer data transmission is requested.<br />

1 Delays starting of transmission until completion of stop bit of reception when buffer<br />

data transmission is requested.<br />

The UFnTW bit is used to delay starting of transmission until completion of the stop bit of reception<br />

when transmitting buffer data in LIN communication. It can be set only in automatic baud rate mode<br />

(UFnMD1, UFnMD0 = 11B). See 13.5.11 Transmission start wait function and 13.7 LIN<br />

Communication Automatic Baud Rate Mode for details.<br />

Cautions 1. Setting this bit is prohibited except when switching to response transmission<br />

after header reception.<br />

2. The UFnTW bit becomes valid at the same time as the UFnTRQ bit is set (1).<br />

UFnCON Successive selection bit<br />

0 The data group to be transmitted or received next is the last data group.<br />

1 The data group to be transmitted or received next is not the last data group.<br />

(Data transmission or reception is continued without waiting for the next header to be<br />

received.)<br />

The UFnCON bit indicates that the data group to be transmitted or received next is not the last data<br />

group when the multi-byte response transmission/reception function is used in LIN communication.<br />

It can be set only in automatic baud rate mode (UFnMD1, UFnMD0 = 11B).<br />

See 13.7.5 Multi-byte response transmission/reception function for details.<br />

Cautions 1. Setting this bit is prohibited except when the multi-byte transmission/reception<br />

function is used.<br />

2. Set the UFnCON bit at the same time as setting UFnNO, UFnRRQ, and UFnTRQ<br />

for 16-bit access.<br />

UFnECS Enhanced checksum selection bit<br />

0 Classic checksum (used only for data byte calculation)<br />

1 Enhanced checksum (used for calculating data byte + PID byte)<br />

The UFnECS bit is used to select how to handle checksum when the automatic checksum function<br />

is used in LIN communication. It is valid only when in automatic baud rate mode (UFnMD1,<br />

UFnMD0 = 11B) and automatic checksum is enabled (UFnACE = 1).<br />

See 13.7.4 Automatic checksum function for details.<br />

R01UH0317EJ0004 Rev. 0.04 711<br />

Feb. 22, 2013

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