RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 9 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER CHAPTER 9 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER 9.1 Functions of Clock Output/Buzzer Output Controller The clock output controller is intended for carrier output during remote controlled transmission and clock output for supply to peripheral ICs. Buzzer output is a function to output a square wave of buzzer frequency. One pin can be used to output a clock or buzzer sound. The PCL pin outputs a clock selected by clock output select register 0 (CKS0). Figure 9-1 shows the block diagram of clock output/buzzer output controller. Caution In the low-consumption RTC mode (when the RTCLPC bit of the operation speed mode control register (OSMC) = 1), it is not possible to output the subsystem clock (fSUB) from the PCL pin. R01UH0317EJ0004 Rev. 0.04 489 Feb. 22, 2013
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 9 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER Figure 9-1. Block Diagram of Clock Output/Buzzer Output Controller Selector Note For output frequencies available from PCL, refer to 32.5 AC characteristics and 33.5 AC characteristics. R01UH0317EJ0004 Rev. 0.04 490 Feb. 22, 2013 Selector
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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34.2 64-pin products 1276 R5F10CLDx
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