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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF)<br />

13.5.10 Status interrupt generation sources<br />

Status interrupt generation sources include parity errors, framing errors, overrun errors, data consistency errors which<br />

occur only during LIN communication, successful BF reception, ID parity errors, checksum errors, and response<br />

preparation errors which occur only in automatic baud rate mode, and ID matches and expansion bit detections which<br />

occur only when expansion bits are enabled. When these sources are detected, a status interrupt request signal (INTLSn)<br />

is generated. The type of a generation source can be referenced by using the status register (UFnSTR). The content of<br />

processing is determined by referencing the UFnSTR register in the status interrupt servicing routine.<br />

Status flags must be cleared by writing “1” to the corresponding bits (excluding the UFnTSF and UFnRSF bits of the<br />

UFnSTC register) by using software.<br />

The status interrupt generation timing and status flag change timing differ, depending on the mode setting and<br />

generation source.<br />

Table 13-3. Status Interrupt Generation Sources<br />

Status Flag Generation Source Description<br />

UFnPE Parity error The parity calculation result of receive data and the value of the<br />

received parity bit do not match.<br />

UFnFE Framing error No stop bit is detected.<br />

(A low level is detected at a stop bit position.)<br />

UFnOVE Overrun error The next data reception is completed before the receive data<br />

transferred to the receive data register is read.<br />

UFnDCE Data consistency error The data consistency check selection bit (UFnDCS) is set, and the<br />

values of transmit data and receive data do not match during data<br />

transmission. Transmission operation and reception operation are<br />

out of synchronization.<br />

UFnBSF Successful BF reception A new BF is successfully received when in BF reception enable<br />

mode during communication (UFnMD1, UFnMD0 = 10B). (This<br />

occurs also when the master transmits a BF.)<br />

UFnIPE ID parity error Either parity bit of the received PID includes an error.<br />

UFnCSE Checksum error The result of comparing the checksum received during response<br />

reception and the automatically calculated result is illegal.<br />

UFnRPE Response preparation Response preparation could not be performed before reception of<br />

error<br />

the first byte by a response was completed.<br />

UFnIDM ID match When the following conditions are satisfied:<br />

- Comparison of expansion bit data is enabled (UFnEBC = 1).<br />

- The expansion bit is at the level set by using the expansion bit<br />

detection level selection bit (UFnEBL).<br />

- The received data matches the value of the UFnID register.<br />

UFnEBD Expansion bit detection The level set by using the expansion bit detection level select bit<br />

(UFnEBL) is detected at a receive data expansion bit.<br />

Remark n = 0, 1<br />

R01UH0317EJ0004 Rev. 0.04 745<br />

Feb. 22, 2013

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