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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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R01UH0317EJ0004 Rev. 0.04 671<br />

Feb. 22, 2013<br />

SE<br />

00<br />

Note1<br />

Table 12-4. Relationship between register settings and pins (Channel 0 of unit 0: CSI00, SCSI0001 = 0, SCSI000 = 0)<br />

MD<br />

002<br />

MD<br />

001<br />

SOE<br />

00<br />

SO<br />

00<br />

CKO<br />

00<br />

TXE<br />

00<br />

RXE<br />

00<br />

0 0 0 0 1 1 0 0 <br />

Note2<br />

PM10 P10 PM11 P11 PM12 P12 Operation mode<br />

<br />

Note2<br />

<br />

Note2<br />

<br />

Note2<br />

<br />

Note2<br />

1 0 0 0 1 1 0 1 1 1 <br />

Note2<br />

1 0/1<br />

Note3<br />

1 0/1<br />

Note3<br />

<br />

Note2<br />

<br />

Note2<br />

Operation stop<br />

mode<br />

Slave CSI00<br />

reception<br />

1 1 0 1 0 1 Slave CSI00<br />

transmission<br />

1 1 1 1 1 0 1 Slave CSI00<br />

transmission/<br />

reception<br />

0 1 0/1 0 1 0 1 1 <br />

Note2<br />

1 0/1<br />

Note3 0/1<br />

Note3<br />

1 0/1<br />

Note3 0/1<br />

Note3<br />

<br />

Note2<br />

Master CSI00<br />

reception<br />

1 0 0 1 0 1 Master CSI00<br />

transmission<br />

1 1 0 1 1 0 1 Master CSI00<br />

transmission/<br />

reception<br />

P10/LTxD1/<br />

SCK00/TI10/<br />

TO10/INTP4<br />

P10/LTxD1/<br />

TI10/TO10/<br />

INTP4<br />

SCK00<br />

(input)<br />

SCK00<br />

(input)<br />

SCK00<br />

(input)<br />

SCK00<br />

(output)<br />

SCK00<br />

(output)<br />

SCK00<br />

(output)<br />

Notes 1. The SE0 register is a read-only status register which is set using the SS0 and ST0 registers.<br />

2. This pin can be set as a port function pin or other alternate function pin.<br />

3. This is 0 or 1, depending on the communication operation. For details, refer to 12.3 (12) Serial output register m (SOm).<br />

Caution The shaded pins are provided at some ports. Select either port by using the corresponding register.<br />

Remark Setting LIN-UART is prohibited.<br />

Pin Function<br />

P11/LRxD1/<br />

INTPLR1/SI0<br />

0/TI11/TO11<br />

P11/LRxD1/<br />

INTPLR1/<br />

TI11/TO11<br />

P12/SO00/<br />

TI12/TO12/<br />

INTP2<br />

P12/TI12/<br />

TO12/<br />

INTP2<br />

SI00 P12/TI12/<br />

TO12/<br />

INTP2<br />

P11/TI11/ SO00<br />

TO11<br />

SI00 SO00<br />

SI00 P12/SO00/<br />

TI12/TO12/<br />

INTP2<br />

P11/TI11/ SO00<br />

TO11<br />

SI00 SO00<br />

671<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 12 SERIAL ARRAY UNIT<br />

Specifications in this document are tentative and subject to change.<br />

Under development Preliminary document

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