RL78/D1A User's Manual: Hardware - Renesas

Under development
Preliminary document
Specifications in this document are tentative and subject to change.
RL78/D1A CHAPTER 6 TIMER ARRAY UNIT
Figure 6-65. Example of Set Contents of Registers to Measure Input Pulse Interval (1/2)
(a) Timer mode register mn (TMRmn)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TMRmn CKSmn1 CKSmn0
1/0
1/0
0
CCSmn
0
MAS
TERmn
0
STSmn2 STSmn1 STSmn0 CISmn1 CISmn0
0
0
1
R01UH0317EJ0004 Rev. 0.04 421
Feb. 22, 2013
1/0
1/0
0
0
MDmn3 MDmn2 MDmn1 MDmn0
Operation mode of channel n
010B: Capture mode
0
1
0
1/0
Setting of operation when counting is started
0: Does not generate INTTMmn when
counting is started.
1: Generates INTTMmn when counting is
started.
Selection of TImn pin input edge
00B: Detects falling edge.
01B: Detects rising edge.
10B: Detects both edges.
11B: Setting prohibited
Capture trigger selection
001B: Selects the TImn pin input valid edge.
Slave/master selection
0: Cleared to 0 when single-operation function is selected.
Count clock selection
0: Selects operation clock.
Operation clock selection
00B: Selects CKm0 as operation clock of channel n.
01B: Selects CKm1 as operation clock of channel n.
10B: Selects CKm2 as operation clock of channel n.
11B: Selects CKm3 as operation clock of channel n.
(b) Timer output register m (TOm)
Bit n
0: Outputs 0 from TOmn.
0
TOm TOmn
(c) Timer output enable register m (TOEm)
Bit n
0: Stops TOmn output operation by counting operation.
0
TOEm TOEmn
Remark m: Unit number (m = 0 to 2)
n: Channel number (n = 0 to 7)