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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 33 ELECTRICAL SPECIFICATIONS (L GRADE PRODUCT) (TARGET)<br />

33.2 Power consumption characteristics<br />

TA = -40 to +105 C, 2.7 V VDD 5.5 V, VSS = 0 V<br />

Parameter Symbols Conditions Typ. Max. Unit<br />

Supply current,<br />

Note 1<br />

IDD1 High speed fCLK = 24 MHz fHOCO = 24 MHz<br />

2.4 18 mA<br />

run mode<br />

MAIN RUN<br />

fHOCO = 4 MHz with PLL<br />

Note 2, 3<br />

fX = 4 MHz with PLL<br />

fX = 8 MHz with PLL<br />

fCLK = 20 MHz fX = 20 MHz 3.8 16 mA<br />

fCLK = 8 MHz fHOCO = 8 MHz<br />

fX = 8 MHz<br />

2.1 11 mA<br />

fCLK = 4 MHz fHOCO = 4 MHz<br />

fX = 4 MHz<br />

1.6 9 mA<br />

SUB<br />

Note 2, 3<br />

RUN fCLK = fXT = 32.768 kHz 6 500 A<br />

Notes 1. The common condition for IDD1:<br />

- IDD includes the total current flowing into whole power pins, including the input leakage<br />

current flowing when the level of the input pin is fixed to VDD or VSS.<br />

- The program is running in the code flash.<br />

2. The typical value is that when Ta=+25deg.C and VDD=5.0 V. Peripheral devices and the data<br />

flash are stopped.<br />

3. The maximum value is that when all peripheral devices are operating. But the A/D converter,<br />

RTC, LCD circuit and stepper motor circuit are stopped, and the data flash and the code flash<br />

are stated to read mode. The 16-bit wakeup timer operates with fLOCO.<br />

R01UH0317EJ0004 Rev. 0.04 1246<br />

Feb. 22, 2013

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