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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 29 ON-CHIP DEBUG FUNCTION<br />

CHAPTER 29 ON-CHIP DEBUG FUNCTION<br />

29.1 Connecting E1 On-chip Debugging Emulator to <strong>RL78</strong>/<strong>D1A</strong><br />

The <strong>RL78</strong>/<strong>D1A</strong> uses the VDD, RESET, TOOL0, and VSS pins to communicate with the host machine via an E1 on-chip<br />

debugging emulator. Serial communication is performed by using a single-line UART that uses the TOOL0 pin.<br />

Caution The <strong>RL78</strong>/<strong>D1A</strong> has an on-chip debug function, which is provided for development and evaluation. Do<br />

not use the on-chip debug function in products designated for mass production, because the<br />

guaranteed number of rewritable times of the flash memory may be exceeded when this function is<br />

used, and product reliability therefore cannot be guaranteed. <strong>Renesas</strong> Electronics is not liable for<br />

problems occurring when the on-chip debug function is used.<br />

Figure 29-1. Connection Example of E1 On-chip Debugging Emulator and <strong>RL78</strong>/<strong>D1A</strong><br />

E1 target connector<br />

VDD<br />

EMVDD<br />

EVDD<br />

GND<br />

SMVDD<br />

SMVDD<br />

GND GND<br />

GND<br />

TOOL0<br />

Note 1<br />

R01UH0317EJ0004 Rev. 0.04 1183<br />

Feb. 22, 2013<br />

Note 2<br />

VDD<br />

TOOL0<br />

RESET RESET<br />

RESET<br />

TRESET<br />

VDD<br />

EVDD<br />

EVDD<br />

VDD<br />

1 kΩ<br />

10 kΩ 1 kΩ<br />

VDD<br />

EVDD<br />

<strong>RL78</strong>/<strong>D1A</strong><br />

Reset circuit<br />

Reset signal<br />

Notes 1. Connecting the dotted line is not necessary during flash programming.<br />

2. If the reset circuit on the target system does not have a buffer and generates a reset signal only with<br />

resistors and capacitors, this pull-up resistor is not necessary.<br />

Caution This circuit diagram is assumed that the reset signal outputs from an N-ch O.D. buffer (output<br />

resistor: 100 or less)

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