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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 3 CPU ARCHITECTURE<br />

3.2.4 Special function registers (SFRs)<br />

Unlike a general-purpose register, each SFR has a special function.<br />

SFRs are allocated to the FFF00H to FFFFFH area.<br />

SFRs can be manipulated like general-purpose registers, using operation, transfer, and bit manipulation instructions.<br />

The manipulable bit units, 1, 8, and 16, depend on the SFR type.<br />

Each manipulation bit unit can be specified as follows.<br />

1-bit manipulation<br />

Describe the symbol reserved by the assembler for the 1-bit manipulation instruction operand (sfr.bit). This<br />

manipulation can also be specified with an address.<br />

8-bit manipulation<br />

Describe the symbol reserved by the assembler for the 8-bit manipulation instruction operand (sfr). This<br />

manipulation can also be specified with an address.<br />

16-bit manipulation<br />

Describe the symbol reserved by the assembler for the 16-bit manipulation instruction operand (sfrp). When<br />

specifying an address, describe an even address.<br />

Table 3-5 gives a list of the SFRs. The meanings of items in the table are as follows.<br />

Symbol<br />

Symbol indicating the address of a special function register. It is a reserved word in the assembler, and is defined<br />

as an sfr variable using the #pragma sfr directive in the compiler. When using the assembler, debugger, and<br />

simulator, symbols can be written as an instruction operand.<br />

R/W<br />

Indicates whether the corresponding SFR can be read or written.<br />

R/W: Read/write enable<br />

R: Read only<br />

W: Write only<br />

Manipulable bit units<br />

“” indicates the manipulable bit unit (1, 8, or 16). “” indicates a bit unit for which manipulation is not possible.<br />

After reset<br />

Indicates each register status upon reset signal generation.<br />

Caution Do not access addresses to which extended SFRs are not assigned.<br />

Remark For extended SFRs (2nd SFRs), see 3.2.5 Extended special function registers (2nd SFRs: 2nd Special<br />

Function Registers).<br />

R01UH0317EJ0004 Rev. 0.04 98<br />

Feb. 22, 2013

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