RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 14 CAN CONTROLLER Figure 14-87. Setting CPU Standby (from CAN Sleep Mode) START Set PSMODE0 bit PSMODE0 = 1? Yes CAN sleep mode MBON bit = 0? Yes Set CPU standby mode END No No Clear PSMODE0 bit Clear CINTS5 bit R01UH0317EJ0004 Rev. 0.04 943 Feb. 22, 2013 No CINTS5 bit = 1? Caution Before the CPU is set in the CPU standby mode, please check the CAN sleep mode or not. However, after check of the CAN sleep mode, until the CPU is set in the CPU standby mode, the CAN sleep mode may be cancelled by wakeup from CAN bus. Yes
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 14 CAN CONTROLLER Note During wakeup interrupts Figure 14-88. Setting CPU Standby (from CAN Stop Mode) Clear PSMODE0 bit Clear CINTS5 bit Note No START Set PSMODE0 bit PSMODE0 = 1? Set CPU standby mode R01UH0317EJ0004 Rev. 0.04 944 Feb. 22, 2013 Yes CAN sleep mode Set PSMODE1 bit PSMODE1 = 1? END Yes CAN stop mode MBON bit = 0? Caution The CAN stop mode can only be released by writing 01B to the PSMODE[1:0] bit of the C0CTRL register and not by a change in the CAN bus state. Yes No No
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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12.5.3 Master transmission/receptio
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19.2 Configuration of DMA Controlle
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RL78/D1A User’s Manual: Hardware
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