RL78/D1A User's Manual: Hardware - Renesas

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R01UH0317EJ0004 Rev. 0.04 1295 Feb. 22, 2013 Necessary WAIT I/O register(SFR) name R/W Bit R/W Address READ(MIN.) READ(MAX.) WRITE(MIN.) WRITE(MAX.) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 8 16 7 6 5 4 3 2 1 0 1 1 1 1 F0287 SG0CTL (Control register) E E - R R R E R R E E SG0PWR SG0OS SG0ALDS - - - E - - E E 1 1 1 1 F0288 SG0ITH (Interrupt threshold register) - - E - - - - - - - - 1 1 1 1 F02F0 CRC0CTL (Flash memory CRC control register) E E - E R E E E E E E CRC0EN FEA5 FEA4 FEA3 FEA2 FEA1 FEA0 E - E E E E E E 1 1 1 1 F02F2 PGCRCL (Flash memory CRC operation result register) - - E - - - - - - - - 1 1 1 1 F02FA CRCD (CRC data register) - - E - - - - - - - - 1 1 1 1 F0300 SEG0 (LCD display data memory0) - E - - - - - - - - - 1 1 1 1 F0301 SEG1 (LCD display data memory1) - E - - - - - - - - - 1 1 1 1 F0302 SEG2 (LCD display data memory2) - E - - - - - - - - - 1 1 1 1 F0303 SEG3 (LCD display data memory3) - E - - - - - - - - - 1 1 1 1 F0304 SEG4 (LCD display data memory4) - E - - - - - - - - - 1 1 1 1 F0305 SEG5 (LCD display data memory5) - E - - - - - - - - - 1 1 1 1 F0306 SEG6 (LCD display data memory6) - E - - - - - - - - - 1 1 1 1 F0307 SEG7 (LCD display data memory7) - E - - - - - - - - - 1 1 1 1 F0308 SEG8 (LCD display data memory8) - E - - - - - - - - - 1 1 1 1 F0309 SEG9 (LCD display data memory9) - E - - - - - - - - - 1 1 1 1 F030A SEG10 (LCD display data memory10) - E - - - - - - - - - 1 1 1 1 F030B SEG11 (LCD display data memory11) - E - - - - - - - - - 1 1 1 1 F030C SEG12 (LCD display data memory12) - E - - - - - - - - - 1 1 1 1 F030D SEG13 (LCD display data memory13) - E - - - - - - - - - 1 1 1 1 F030E SEG14 (LCD display data memory14) - E - - - - - - - - - 1 1 1 1 F030F SEG15 (LCD display data memory15) - E - - - - - - - - - 1 1 1 1 F0310 SEG16 (LCD display data memory16) - E - - - - - - - - - 1 1 1 1 F0311 SEG17 (LCD display data memory17) - E - - - - - - - - - 1 1 1 1 F0312 SEG18 (LCD display data memory18) - E - - - - - - - - - 1 1 1 1 F0313 SEG19 (LCD display data memory19) - E - - - - - - - - - 1 1 1 1 F0314 SEG20 (LCD display data memory20) - E - - - - - - - - - 1 1 1 1 F0315 SEG21 (LCD display data memory21) - E - - - - - - - - - 1 1 1 1 F0316 SEG22 (LCD display data memory22) - E - - - - - - - - - 1 1 1 1 F0317 SEG23 (LCD display data memory23) - E - - - - - - - - - 1295 RL78/D1A APPENDIX A NUMBER OF WAIT CYCLES TO ACCESS I/O REGISTERS Specifications in this document are tentative and subject to change. Under development Preliminary document
R01UH0317EJ0004 Rev. 0.04 1296 Feb. 22, 2013 Necessary WAIT I/O register(SFR) name R/W Bit R/W Address READ(MIN.) READ(MAX.) WRITE(MIN.) WRITE(MAX.) Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 8 16 7 6 5 4 3 2 1 0 1 1 1 1 F0318 SEG24 (LCD display data memory24) - E - - - - - - - - - 1 1 1 1 F0319 SEG25 (LCD display data memory25) - E - - - - - - - - - 1 1 1 1 F031A SEG26 (LCD display data memory26) - E - - - - - - - - - 1 1 1 1 F031B SEG27 (LCD display data memory27) - E - - - - - - - - - 1 1 1 1 F031C SEG28 (LCD display data memory28) - E - - - - - - - - - 1 1 1 1 F031D SEG29 (LCD display data memory29) - E - - - - - - - - - 1 1 1 1 F031E SEG30 (LCD display data memory30) - E - - - - - - - - - 1 1 1 1 F031F SEG31 (LCD display data memory31) - E - - - - - - - - - 1 1 1 1 F0320 SEG32 (LCD display data memory32) - E - - - - - - - - - 1 1 1 1 F0321 SEG33 (LCD display data memory33) - E - - - - - - - - - 1 1 1 1 F0322 SEG34 (LCD display data memory34) - E - - - - - - - - - 1 1 1 1 F0323 SEG35 (LCD display data memory35) - E - - - - - - - - - 1 1 1 1 F0324 SEG36 (LCD display data memory36) - E - - - - - - - - - 1 1 1 1 F0325 SEG37 (LCD display data memory37) - E - - - - - - - - - 1 1 1 1 F0326 SEG38 (LCD display data memory38) - E - - - - - - - - - 1 1 1 1 F0327 SEG39 (LCD display data memory39) - E - - - - - - - - - 1 1 1 1 F0328 SEG40 (LCD display data memory40) - E - - - - - - - - - 1 1 1 1 F0329 SEG41 (LCD display data memory41) - E - - - - - - - - - 1 1 1 1 F032A SEG42 (LCD display data memory42) - E - - - - - - - - - 1 1 1 1 F032B SEG43 (LCD display data memory43) - E - - - - - - - - - 1 1 1 1 F032C SEG44 (LCD display data memory44) - E - - - - - - - - - 1 1 1 1 F032D SEG45 (LCD display data memory45) - E - - - - - - - - - 1 1 1 1 F032E SEG46 (LCD display data memory46) - E - - - - - - - - - 1 1 1 1 F032F SEG47 (LCD display data memory47) - E - - - - - - - - - 1 1 1 1 F0330 SEG48 (LCD display data memory48) - E - - - - - - - - - 1 1 1 1 F0331 SEG49 (LCD display data memory49) - E - - - - - - - - - 1 1 1 1 F0332 SEG50 (LCD display data memory50) - E - - - - - - - - - 1 1 1 1 F0333 SEG51 (LCD display data memory51) - E - - - - - - - - - 1 1 1 1 F0334 SEG52 (LCD display data memory52) - E - - - - - - - - - 3 3 3 3 F0340 C1GMCTRL (CAN1 global module control register) - - E - - - - - - - - 3 3 3 3 F0342 C1GMCS (CAN1 global module clock select register) - E - - - - - - - - - 1296 RL78/D1A APPENDIX A NUMBER OF WAIT CYCLES TO ACCESS I/O REGISTERS Specifications in this document are tentative and subject to change. Under development Preliminary document
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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