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RL78/D1A User's Manual: Hardware - Renesas

RL78/D1A User's Manual: Hardware - Renesas

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Under development<br />

Preliminary document<br />

Specifications in this document are tentative and subject to change.<br />

<strong>RL78</strong>/<strong>D1A</strong> CHAPTER 13 ASYNCHRONOUS SERIAL INTERFACE LIN-UART (UARTF)<br />

Figure 13-5. Format of LIN-UARTn Option Register 1 (UFnOPT1) (3/3)<br />

UFnMD1 UFnMD0 LIN-UART operation mode select bit<br />

0 0 Normal UART mode<br />

0 1 Setting prohibited<br />

1 0 LIN communication: BF reception enable mode during communication<br />

Detects a new Break Field during data communication.<br />

(When a low level has been detected at the stop bit position, a wait is<br />

performed until the next high level is detected and a new BF reception is<br />

recognized if the low-level period is at least 11 bits.)<br />

1 1 LIN communication: Automatic baud rate mode<br />

Cautions 1. Setting to automatic baud rate mode (UFnMD1, UFnMD0 = 11B) is prohibited for<br />

a LIN communication master.<br />

2. Be sure to also set the UFnDCS bit to “1” when in BF reception enable mode<br />

during communication (UFnMD1, UFnMD0 = 10B) or in automatic baud rate<br />

mode (UFnMD1, UFnMD0 = 11B).<br />

Remark When in BF reception enable mode during communication (UFnMD1, UFnMD0 = 10B)<br />

during LIN communication, set TMLINn to 1 and select the input signal of the serial data<br />

input pin (LRxDn) as a timer input.<br />

UFnDCS Data consistency check select bit<br />

0 Does not check data consistency.<br />

1 Checks data consistency.<br />

The UFnDCS bit is used to select how to handle a data consistency check when transmitting data<br />

via LIN communication. For details, see 13.5.8 Data consistency check.<br />

When UFnDCS is “1”, transmit data and receive data will be compared when transmitting data via<br />

LIN communication. When a mismatch is detected, a data consistency error flag (UFnDCE) will<br />

be set and a status interrupt request signal (INTLSn) will be generated.<br />

Cautions 1. When using LIN communication, the UFnDCS bit can be set. Otherwise, clear<br />

the UFnDCS bit to “0”.<br />

2. When setting (1) the UFnDCS bit, fix the data bit length to 8 bits. Appending a<br />

parity bit is prohibited.<br />

3. Be sure to also set the UFnDCS bit to “1” when in BF reception enable mode<br />

during communication (UFnMD1, UFnMD0 = 10B) or in automatic baud rate<br />

mode (UFnMD1, UFnMD0 = 11B).<br />

R01UH0317EJ0004 Rev. 0.04 693<br />

Feb. 22, 2013

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