RL78/D1A User's Manual: Hardware - Renesas

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Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 12 SERIAL ARRAY UNIT (1) Register setting Figure 12-79. Example of Contents of Registers for Data Reception of Simplified I 2 C (IIC11) (1/2) (a) Serial output register m (SOm) … Do not manipulate this register during data transmission/reception. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SOm 0 0 0 0 0 0 CKOm1 CKOm0 0/1 Note (b) Serial output enable register m (SOEm) … Do not manipulate this register during data transmission/reception. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SOEm 0 0 0 0 0 0 0 (c) Serial channel start register m (SSm) … Do not manipulate this register during data transmission/reception. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SSm 0 0 0 0 0 0 0 (d) Serial mode register mn (SMRmn) … Do not manipulate this register during data transmission/reception. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SMRmn CKSmn 0/1 CCSmn 0 0 0 0 0 0 0 0 STSmn 0 R01UH0317EJ0004 Rev. 0.04 661 Feb. 22, 2013 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 MDmn2 1 SOm1 SOEm1 0/1 SSm1 0/1 MDmn1 0 SOm0 0/1 Note (e) Serial communication operation setting register mn (SCRmn) … Do not manipulate the bits of this register, except the TXEmn and RXEmn bits, during data transmission/reception. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SCRmn TXEmn 0 RXEmn 1 DAPmn 0 CKPmn 0 0 0 0 0 DIRmn 0 0 SLCmn1 0 SLCmn0 1 DLSmn3 0 DLSmn2 1 Note The value varies depending on the communication data during communication operation. DLSmn1 1 Remark m: Unit number (m = 1), n: Channel number (n = 1), r: IIC number (r = 11) : Setting is fixed in the IIC mode, : Setting disabled (set to the initial value) : Bit that cannot be used in this mode (set to the initial value when not used in any mode) 0/1: Set to 0 or 1 depending on the usage of the user SOEm0 0/1 SSm0 0/1 MDmn0 0 DLSmn0 1
Under development Preliminary document Specifications in this document are tentative and subject to change. RL78/D1A CHAPTER 12 SERIAL ARRAY UNIT Figure 12-79. Example of Contents of Registers for Data Reception of Simplified I 2 C (IIC11) (2/2) (f) Serial data register mn (SDRmn) (i) When operation is stopped (SEmn = 0) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SDRmn Baud rate setting (ii) During operation (SEmn = 1) (lower 8 bits: SDRrL) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SDRmn 0 R01UH0317EJ0004 Rev. 0.04 662 Feb. 22, 2013 0 0 Dummy transmit data setting (FFH) 0 0 SDRrL Remark m: Unit number (m = 1), n: Channel number (n = 1), r: IIC number (r = 11) : Setting is fixed in the IIC mode, : Setting disabled (set to the initial value) 0/1: Set to 0 or 1 depending on the usage of the user 0 0 0 0
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User’s Manual 16 RL78/D1A 16-Bit
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NOTES FOR CMOS DEVICES (1) VOLTAGE
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Conventions Data significance: High
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CONTENTS CHAPTER 1 OUTLINE.........
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3.4.4 Short direct addressing .....
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6.8 Operation of Plural Channels of
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12.5.3 Master transmission/receptio
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14.9.1 Message reception ..........
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19.2 Configuration of DMA Controlle
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