ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
VPADDL. , Encoded as Q = 1
VPADDL. , Encoded as Q = 0
where:
Instruction Details
See Standard assembler syntax fields on page A8-7. An ARM VPADDL instruction must be
unconditional.
The data type for the elements of the vectors. It must be one of:
S8 encoded as size = 0b00, op = 0
S16 encoded as size = 0b01, op = 0
S32 encoded as size = 0b10, op = 0
U8 encoded as size = 0b00, op = 1
U16 encoded as size = 0b01, op = 1
U32 encoded as size = 0b10, op = 1.
, The destination vector and the operand vector, for a quadword operation.
, The destination vector and the operand vector, for a doubleword operation.
Operation
if ConditionPassed() then
EncodingSpecificOperations(); CheckAdvSIMDEnabled();
h = elements/2;
for r = 0 to regs-1
for e = 0 to h-1
op1 = Elem[D[m+r],2*e,esize]; op2 = Elem[D[m+r],2*e+1,esize];
result = Int(op1, unsigned) + Int(op2, unsigned);
Elem[D[d+r],e,2*esize] = result;
Exceptions
Undefined Instruction.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-689