ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
SADD16 {,} ,
where:
See Standard assembler syntax fields on page A8-7.
The destination register.
The first operand register.
The second operand register.
Operation
if ConditionPassed() then
EncodingSpecificOperations();
sum1 = SInt(R[n]) + SInt(R[m]);
sum2 = SInt(R[n]) + SInt(R[m]);
R[d] = sum1;
R[d] = sum2;
APSR.GE = if sum1 >= 0 then ‘11’ else ‘00’;
APSR.GE = if sum2 >= 0 then ‘11’ else ‘00’;
Exceptions
None.
Instruction Details
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-297