ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Instruction Details
A8.6.391 VST1 (multiple single elements)
Vector Store (multiple single elements) stores elements to memory from one, two, three, or four registers,
without interleaving. Every element of each register is stored. For details of the addressing mode see
Advanced SIMD addressing mode on page A7-30.
Encoding T1 / A1 Advanced SIMD
VST1. , [{@}]{!}
VST1. , [{@}],
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 0 0 1 0 D 0 0 Rn Vd type size align Rm
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 0 1 0 0 0 D 0 0 Rn Vd type size align Rm
case type of
when ‘0111’
regs = 1; if align == ‘1’ then UNDEFINED;
when ‘1010’
regs = 2; if align == ‘11’ then UNDEFINED;
when ‘0110’
regs = 3; if align == ‘1’ then UNDEFINED;
when ‘0010’
regs = 4;
otherwise
SEE “Related encodings”;
alignment = if align == ‘00’ then 1 else 4