ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

CP15 c7, Data and Instruction Barrier operations
Virtual Memory System Architecture (VMSA)
ARMv6 includes two CP15 c7 operations to perform Data Barrier operations, and another operation to
perform an Instruction Barrier operation. In ARMv7:
The ARM and Thumb instruction sets include instructions to perform the barrier operations, that can
be executed in all modes, see Memory barriers on page A3-47.
The CP15 c7 operations are defined as write-only operations, that can be executed in all modes. The
three operations are described in:
— Instruction Synchronization Barrier operation
— Data Synchronization Barrier operation
— Data Memory Barrier operation.
The value in the register Rt specified by the MCR instruction used to perform one of these operations
is ignored. You do not have to write a value to the register before issuing the MCR instruction.
In ARMv7 using these CP15 c7 operations is deprecated. Use the ISB, DSB, and DMB instructions
instead.
Note
In ARMv6 and earlier documentation, the Instruction Synchronization Barrier operation is referred
to as a Prefetch Flush (PFF).
In versions of the ARM architecture before ARMv6 the Data Synchronization Barrier operation is
described as a Data Write Barrier (DWB).
Instruction Synchronization Barrier operation
In ARMv7, the ISB instruction is used to perform an Instruction Synchronization Barrier, see ISB on
page A8-102.
The deprecated CP15 c7 encoding for an Instruction Synchronization Barrier is set to 0, set to
c7, set to c5, and set to 4.
Data Synchronization Barrier operation
In ARMv7, the DSB instruction is used to perform a Data Synchronization Barrier, see DSB on page A8-92.
The deprecated CP15 c7 encoding for a Data Synchronization Barrier is set to 0, set to c7,
set to c10, and set to 4. This operation performs the full system barrier performed by the DSB
instruction.
Data Memory Barrier operation
In ARMv7, the DMB instruction is used to perform a Data Memory Barrier, see DMB on page A8-90.
The deprecated CP15 c7 encoding for a Data Memory Barrier is set to 0, set to c7, set to
c10, and set to 5. This operation performs the full system barrier performed by the DMB instruction.
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