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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Virtual Memory System <strong>Architecture</strong> (VMSA)<br />

B3.12.14 c0, IMPLEMENTATION DEFINED Auxiliary ID Register (AIDR)<br />

The IMPLEMENTATION DEFINED Auxiliary ID Register, AIDR, provides implementation-specific ID<br />

information. The value of this register must be used in conjunction with the value of MIDR.<br />

The IMPLEMENTATION DEFINED AIDR is:<br />

a 32-bit read-only register<br />

accessible only in privileged modes<br />

when the Security Extensions are implemented, a Common register<br />

introduced in <strong>ARM</strong>v7.<br />

The format of the AIDR is IMPLEMENTATION DEFINED.<br />

Accessing the AIDR<br />

To access the AIDR you read the CP15 registers with set to 1, set to c0, set to c0, <strong>and</strong><br />

set to 7. For example:<br />

MRC p15,1,,c0,c0,7 ; Read IMPLEMENTATION DEFINED Auxiliary ID Register<br />

B3-94 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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