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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Instruction Details<br />

A8.6.260 UXTAB<br />

Unsigned Extend <strong>and</strong> Add Byte extracts an 8-bit value from a register, zero-extends it to 32 bits, adds the<br />

result to the value in another register, <strong>and</strong> writes the final result to the destination register. You can specify<br />

a rotation by 0, 8, 16, or 24 bits before extracting the 8-bit value.<br />

Encoding T1 <strong>ARM</strong>v6T2, <strong>ARM</strong>v7<br />

UXTAB ,,{,}<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

1 1 1 1 1 0 1 0 0 1 0 1 Rn 1 1 1 1 Rd 1 (0) rotate Rm<br />

if Rn == ‘1111’ then SEE UXTB;<br />

d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); rotation = UInt(rotate:’000’);<br />

if BadReg(d) || n == 13 || BadReg(m) then UNPREDICTABLE;<br />

Encoding A1 <strong>ARM</strong>v6*, <strong>ARM</strong>v7<br />

UXTAB ,,{,}<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

cond 0 1 1 0 1 1 1 0 Rn Rd rotate (0)(0) 0 1 1 1 Rm<br />

if Rn == ‘1111’ then SEE UXTB;<br />

d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); rotation = UInt(rotate:’000’);<br />

if d == 15 || m == 15 then UNPREDICTABLE;<br />

A8-514 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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