ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Assembler syntax
LDRD , , [ {, #+/-}] Offset: index==TRUE, wback==FALSE
LDRD , , [, #+/-]! Pre-indexed: index==TRUE, wback==TRUE
LDRD , , [], #+/- Post-indexed: index==FALSE, wback==TRUE
where:
See Standard assembler syntax fields on page A8-7.
Instruction Details
The first destination register. For an ARM instruction, must be even-numbered and not
R14.
The second destination register. For an ARM instruction, must be .
The base register. The SP can be used. For PC use see LDRD (literal) on page A8-138.
+/- Is + or omitted if the immediate offset is to be added to the base register value (add == TRUE),
or – if it is to be subtracted (add == FALSE). #0 and #-0 generate different instructions.
The immediate offset used to form the address. For the offset addressing syntax, can
be omitted, meaning an offset of 0. Values are:
Encoding T1 multiples of 4 in the range 0-1020
Encoding A1 any value in the range 0-255.
The pre-UAL syntax LDRD is equivalent to LDRD.
Operation
if ConditionPassed() then
EncodingSpecificOperations(); NullCheckIfThumbEE(n);
offset_addr = if add then (R[n] + imm32) else (R[n] - imm32);
address = if index then offset_addr else R[n];
R[t] = MemA[address,4];
R[t2] = MemA[address+4,4];
if wback then R[n] = offset_addr;
Exceptions
Data Abort.
ARM DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. A8-137