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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Introduction to the <strong>ARM</strong> Debug <strong>Architecture</strong><br />

C1.2.3 Major differences between the <strong>ARM</strong>v6 <strong>and</strong> <strong>ARM</strong>v7 Debug architectures<br />

<strong>ARM</strong>v6 is the first version of the <strong>ARM</strong> architecture to include debug. The introduction of the <strong>ARM</strong><br />

architecture Security Extensions extended the <strong>ARM</strong>v6 Debug architecture:<br />

<strong>ARM</strong>v6 processors without the Security Extensions implement v6 Debug<br />

<strong>ARM</strong>v6 processors with the Security Extensions implement v6.1 Debug.<br />

<strong>ARM</strong>v7 introduces additional extensions to support developments in the debug environment.<br />

The main change in the Debug architecture is the specification of new forms of external debug interface.<br />

<strong>ARM</strong>v6 Debug does not require a particular debug interface, but can be implemented with access from a<br />

JTAG interface as defined in IEEE St<strong>and</strong>ard Test Access Port <strong>and</strong> Boundary Scan <strong>Architecture</strong> (JTAG).<br />

However, systems such as the <strong>ARM</strong> CoreSight architecture require changes in the debug interface. For<br />

more information about the CoreSight architecture see the CoreSight <strong>Architecture</strong> Specification.<br />

<strong>ARM</strong>v7 Debug addresses some of the aims of the CoreSight architecture, such as a more system-centric<br />

view of debug, <strong>and</strong> improved debug of powered-down systems.<br />

v7 Debug also introduces an architecture extension to provide performance monitors.<br />

C1.2.4 Summary of the <strong>ARM</strong> debug component descriptions<br />

Table C1-1 shows the main components of v7 Debug, <strong>and</strong> where they are described.<br />

Component Status Type <strong>Reference</strong><br />

For more information, see:<br />

Chapter C10 Debug Registers <strong>Reference</strong><br />

Appendix A Recommended External Debug Interface.<br />

Table C1-1 v7 Debug subarchitectures<br />

Run-control Debug Required Invasive Chapter C2 Invasive Debug Authentication<br />

Chapter C3 Debug Events<br />

Chapter C4 Debug Exceptions<br />

Chapter C5 Debug State<br />

Chapter C6 Debug Register Interfaces<br />

Trace Optional Non-invasive a Trace on page C1-5<br />

Sample-based profiling Optional Non-invasive a Chapter C8 Sample-based Profiling<br />

Performance monitors Optional Non-invasive a Chapter C9 Performance Monitors<br />

a. For information about authentication of these components see Chapter C7 Non-invasive Debug Authentication.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. C1-7

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