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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Chapter B3<br />

Virtual Memory System <strong>Architecture</strong> (VMSA)<br />

This chapter provides a system-level view of the Virtual Memory System <strong>Architecture</strong> (VMSA), the<br />

memory system architecture of an <strong>ARM</strong>v7-A implementation. It contains the following sections:<br />

About the VMSA on page B3-2<br />

Memory access sequence on page B3-4<br />

Translation tables on page B3-7<br />

Address mapping restrictions on page B3-23<br />

Secure <strong>and</strong> Non-secure address spaces on page B3-26<br />

Memory access control on page B3-28<br />

Memory region attributes on page B3-32<br />

VMSA memory aborts on page B3-40<br />

Fault Status <strong>and</strong> Fault Address registers in a VMSA implementation on page B3-48<br />

Translation Lookaside Buffers (TLBs) on page B3-54<br />

Virtual Address to Physical Address translation operations on page B3-63<br />

CP15 registers for a VMSA implementation on page B3-64<br />

Pseudocode details of VMSA memory system operations on page B3-156.<br />

Note<br />

For an <strong>ARM</strong>v7-A implementation, this chapter must be read with Chapter B2 Common Memory System<br />

<strong>Architecture</strong> Features.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. B3-1

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