ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Thumb Instruction Set Encoding
A6.3.16 Multiply, multiply accumulate, and absolute difference
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 1 1 1 0 1 1 0 op1 Ra 0 0 op2
If, in the second halfword of the instruction, bits [7:6] != 0b00, the instruction is UNDEFINED.
Table A6-27 shows the allocation of encodings in this space. Other encodings in this space are UNDEFINED.
These encodings are all available in ARMv6T2 and above.
Table A6-27 Multiply, multiply accumulate, and absolute difference operations
op1 op2 Ra Instruction See
000 00 not 1111 Multiply Accumulate MLA on page A8-190
1111 Multiply MUL on page A8-212
01 - Multiply and Subtract MLS on page A8-192
001 - not 1111 Signed Multiply Accumulate (Halfwords) SMLABB, SMLABT, SMLATB,
SMLATT on page A8-330
1111 Signed Multiply (Halfwords) SMULBB, SMULBT, SMULTB,
SMULTT on page A8-354
010 0x not 1111 Signed Multiply Accumulate Dual SMLAD on page A8-332
1111 Signed Dual Multiply Add SMUAD on page A8-352
011 0x not 1111 Signed Multiply Accumulate (Word by halfword) SMLAWB, SMLAWT on
page A8-340
1111 Signed Multiply (Word by halfword) SMULWB, SMULWT on
page A8-358
100 0x not 1111 Signed Multiply Subtract Dual SMLSD on page A8-342
1111 Signed Dual Multiply Subtract SMUSD on page A8-360
101 0x not 1111 Signed Most Significant Word Multiply Accumulate SMMLA on page A8-346
1111 Signed Most Significant Word Multiply SMMUL on page A8-350
110 0x - Signed Most Significant Word Multiply Subtract SMMLS on page A8-348
111 00 not 1111 Unsigned Sum of Absolute Differences USAD8 on page A8-500
1111 Unsigned Sum of Absolute Differences, Accumulate USADA8 on page A8-502
A6-38 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B