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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Assembler syntax<br />

STREXB , , []<br />

where:<br />

See St<strong>and</strong>ard assembler syntax fields on page A8-7.<br />

The destination register for the returned status value. The value returned is:<br />

0 if the operation updates memory<br />

1 if the operation fails to update memory.<br />

The source register.<br />

The base register. The SP can be used.<br />

Operation<br />

if ConditionPassed() then<br />

EncodingSpecificOperations(); NullCheckIfThumbEE(n);<br />

address = R[n];<br />

if ExclusiveMonitorsPass(address,1) then<br />

MemA[address,1] = R[t];<br />

R[d] = 0;<br />

else<br />

R[d] = 1;<br />

Exceptions<br />

Data Abort.<br />

Aborts<br />

If a synchronous Data Abort exception is generated by the execution of this instruction:<br />

memory is not updated<br />

is not updated.<br />

Instruction Details<br />

If ExclusiveMonitorsPass() returns FALSE <strong>and</strong> the memory address would generate a synchronous Data<br />

Abort exception if accessed, it is IMPLEMENTATION DEFINED whether the exception is generated.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. A8-403

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