ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Register Index
K.1 Register index
Table K-1 shows the main description of each register. The CP15 control coprocessor registers are described
separately for VMSA and PMSA implementations, in the sections:
CP15 registers for a VMSA implementation on page B3-64
CP15 registers for a PMSA implementation on page B4-22.
Table K-1 lists both descriptions of these registers. The PMSA and VMSA implementations of a register
can differ.
Some CP15 registers are only present in a PMSA implementation, or only in a VMSA implementation. This
is shown in Table K-1.
Register In a Description, see
Table K-1 Register index
Access Permissions, pre-ARMv6 c5, Memory Region Access Permissions Registers (DAPR and IAPR) on
page AppxH-45
ACTLR PMSA c1, Implementation defined Auxiliary Control Register (ACTLR) on
page B4-50
VMSA c1, Implementation defined Auxiliary Control Register (ACTLR) on
page B3-103
ADFSR PMSA c5, Auxiliary Data and Instruction Fault Status Registers (ADFSR and
AIFSR) on page B4-56
VMSA c5, Auxiliary Data and Instruction Fault Status Registers (ADFSR and
AIFSR) on page B3-123
AIDR PMSA c0, Implementation defined Auxiliary ID Register (AIDR) on page B4-43
VMSA c0, Implementation defined Auxiliary ID Register (AIDR) on page B3-94
AIFSR PMSA c5, Auxiliary Data and Instruction Fault Status Registers (ADFSR and
AIFSR) on page B4-56
VMSA c5, Auxiliary Data and Instruction Fault Status Registers (ADFSR and
AIFSR) on page B3-123
APSR The Application Program Status Register (APSR) on page A2-14
Authentication Status, Debug Authentication Status Register (DBGAUTHSTATUS) on page C10-96
Auxiliary Control PMSA c1, Implementation defined Auxiliary Control Register (ACTLR) on
page B4-50
VMSA c1, Implementation defined Auxiliary Control Register (ACTLR) on
page B3-103
AppxK-2 Copyright © 1996-1998, 2000, 2004-2008 ARM Limited. All rights reserved. ARM DDI 0406B