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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Virtual Memory System <strong>Architecture</strong> (VMSA)<br />

Second-level descriptors<br />

Table B3-2 shows the possible formats of a second-level descriptor, where bits [1:0] of the descriptor<br />

identify the descriptor type:<br />

0b00 Invalid or fault entry. The associated MVA is unmapped, <strong>and</strong> attempting to access it<br />

generates a Translation fault. Software can use bits [31:2] of an invalid descriptor for its own<br />

purposes, because these bits are ignored by the hardware.<br />

0b01 Large page descriptor. Bits [31:16] of the descriptor are the base address of the Large page.<br />

0b1X Small page descriptor. Bits [31:12] of the descriptor are the base address of the Small page.<br />

In this descriptor format, bit [0] of the descriptor is the XN bit.<br />

Table B3-2 VMSAv7 second-level descriptor formats<br />

31 16 15 14 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

Fault IGNORE 0 0<br />

Large page Large page base address, PA[31:16]<br />

Small page Small page base address, PA[31:12]<br />

The address information in the second-level descriptors is:<br />

Large page Bits [31:16] of the descriptor are bits [31:16] of the physical address of the Large page.<br />

Small page Bits [31:12] of the descriptor are bits [31:12] of the physical address of the Small page.<br />

The other fields in the descriptors are:<br />

XN bit The execute-never bit. Determines whether the region is executable, see The Execute Never<br />

(XN) attribute <strong>and</strong> instruction prefetching on page B3-30.<br />

TEX[2:0], C, B<br />

Memory region attribute bits, see Memory region attributes on page B3-32.<br />

AP[2], AP[1:0]<br />

Access Permissions bits, see Memory access control on page B3-28.<br />

AP[0] can be configured as the access flag, see The access flag on page B3-21.<br />

S bit The Shareable bit. Determines whether the translation is for Shareable memory, see Memory<br />

region attributes on page B3-32.<br />

nG bit The not global bit. Used in the TLB matching process, see Global <strong>and</strong> non-global regions<br />

in the virtual memory map on page B3-54.<br />

B3-10 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B<br />

X<br />

N<br />

TEX<br />

[2:0]<br />

n<br />

G S<br />

n<br />

G S<br />

A<br />

P<br />

[2]<br />

A<br />

P<br />

[2]<br />

SBZ<br />

TEX<br />

[2:0]<br />

AP<br />

[1:0]<br />

AP<br />

[1:0]<br />

C B 0 1<br />

C B 1 X<br />

N

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