ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

Debug Events
when InstrSet_ARM
byte_select_match = (DBGBCR[N] != ‘0000’);
when InstrSet_Thumb, InstrSet_ThumbEE
case address of
when ‘0’ byte_select_match = (DBGBCR[N] != ‘00’);
when ‘1’ byte_select_match = (DBGBCR[N] != ‘00’);
when InstrSet_Jazelle
case address of
when ‘00’ byte_select_match = (DBGBCR[N] == ‘1’);
when ‘01’ byte_select_match = (DBGBCR[N] == ‘1’);
when ‘10’ byte_select_match = (DBGBCR[N] == ‘1’);
when ‘11’ byte_select_match = (DBGBCR[N] == ‘1’);
// Address mask
case DBGBCR[N] of
when ‘00000’
// This implies no mask, but the byte address is always dealt with by
// byte_select_match, so the mask always has the bottom two bits set.
mask = ZeroExtend(‘11’, 32);
when ‘00001’, ‘00010’
UNPREDICTABLE;
otherwise
mask = ZeroExtend(Ones(UInt(DBGBCR[N])), 32);
if DBGBCR[N] != ‘1111’ then unk_match = TRUE;
// Meaning of BVR
case DBGBCR[N] of
when ‘000’ // Unlinked IVA match
cmp_in = address; linked = FALSE; mismatch = FALSE; mon_debug_ok = TRUE;
when ‘001’ // Linked IVA match
cmp_in = address; linked = TRUE; mismatch = FALSE; mon_debug_ok = TRUE;
when ‘010’ // Unlinked context ID match
if N < UInt(DBGDIDR.BRPs) - UInt(DBGDIDR.CTX_CMPs) then UNPREDICTABLE;
if DBGBCR[N] != ‘1111’ || DBGBCR[N] != ‘00000’ then unk_match = TRUE;
mask = Zeros(32);
cmp_in = CONTEXTIDR; linked = FALSE; mismatch = FALSE; mon_debug_ok = FALSE;
when ‘011’ // Linked context ID match (does not match directly, only via link)
return FALSE;
when ‘100’ // Unlinked IVA mismatch
if UInt(DBGDIDR.Version) < 2 then UNPREDICTABLE;
cmp_in = address; linked = FALSE; mismatch = TRUE; mon_debug_ok = FALSE;
when ‘101’ // Linked IVA mismatch
if UInt(DBGDIDR.Version) < 2 then UNPREDICTABLE;
cmp_in = address; linked = TRUE; mismatch = TRUE; mon_debug_ok = FALSE;
otherwise // Reserved
unk_match = TRUE;
if !IsZero(DBGBVR[N] AND mask) then unk_match = TRUE;
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