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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Note<br />

Virtual Memory System <strong>Architecture</strong> (VMSA)<br />

Another instance of the synchronization problem occurs if a branch is encountered between changing the<br />

ASID <strong>and</strong> performing the synchronization. In this case the value in the branch predictor might be associated<br />

with the incorrect ASID. This possibility can be addressed by any of these approaches, but might be<br />

addressed by avoiding such branches.<br />

Example B3-2 Using a reserved ASID to synchronize ASID <strong>and</strong> TTBR changes<br />

In this approach, a particular ASID value is reserved for use by the operating system, <strong>and</strong> is used only for<br />

the synchronization of the ASID <strong>and</strong> Translation Table Base Register. This example uses the value of 0 for<br />

this purpose, but any value could be used.<br />

This approach can be used only when the size of the mapping for any given virtual address is the same in<br />

the old <strong>and</strong> new translation tables.<br />

The following sequence is followed, <strong>and</strong> must be executed from memory marked as being global:<br />

Change ASID to 0<br />

ISB<br />

Change Translation Table Base Register<br />

ISB<br />

Change ASID to new value<br />

This approach ensures that any non-global pages prefetched at a time when it is uncertain whether the old<br />

or new translation tables are being accessed are associated with the unused ASID value of 0. Since the ASID<br />

value of 0 is not used for any normal operations these entries cannot cause corruption of execution.<br />

Example B3-3 Using translation tables that contain only global mappings<br />

when changing the ASID<br />

A second approach involves switching the translation tables to a set of translation tables that only contain<br />

global mappings while switching the ASID.<br />

The following sequence is followed, <strong>and</strong> must be executed from memory marked as being global:<br />

Change Translation Table Base Register to the global-only mappings<br />

ISB<br />

Change ASID to new value<br />

ISB<br />

Change Translation Table Base Register to new value<br />

This approach ensures that no non-global pages can be prefetched at a time when it is uncertain whether the<br />

old or new ASID value will be used.<br />

<strong>ARM</strong> DDI 0406B Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. B3-61

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