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ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition

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Instruction Details<br />

A8.6.110 NOP<br />

No Operation does nothing. This instruction can be used for code alignment purposes.<br />

See Pre-UAL pseudo-instruction NOP on page AppxC-3 for details of NOP before the introduction of UAL<br />

<strong>and</strong> the <strong>ARM</strong>v6K <strong>and</strong> <strong>ARM</strong>v6T2 architecture variants.<br />

Note<br />

The timing effects of including a NOP instruction in code are not guaranteed. It can increase execution time,<br />

leave it unchanged, or even reduce it. NOP instructions are therefore not suitable for timing loops.<br />

Encoding T1 <strong>ARM</strong>v6T2, <strong>ARM</strong>v7<br />

NOP<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0<br />

// No additional decoding required<br />

Encoding T2 <strong>ARM</strong>v6T2, <strong>ARM</strong>v7<br />

NOP.W<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

1 1 1 1 0 0 1 1 1 0 1 0 (1)(1)(1) (1) 1 0 (0) 0 (0) 0 0 0 0 0 0 0 0 0 0 0<br />

// No additional decoding required<br />

Encoding A1 <strong>ARM</strong>v6K, <strong>ARM</strong>v6T2, <strong>ARM</strong>v7<br />

NOP<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

cond 0 0 1 1 0 0 1 0 0 0 0 0 (1)(1)(1)(1)(0)(0)(0)(0) 0 0 0 0 0 0 0 0<br />

// No additional decoding required<br />

A8-222 Copyright © 1996-1998, 2000, 2004-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0406B

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